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[PATCH 0/4] x86: Drop cross-vendor support
- To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Alejandro Vallejo <alejandro.garciavallejo@xxxxxxx>
- Date: Thu, 22 Jan 2026 17:49:36 +0100
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- Cc: Alejandro Vallejo <alejandro.garciavallejo@xxxxxxx>, Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>, Community Manager <community.manager@xxxxxxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, "Andrew Cooper" <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Jason Andryuk <jason.andryuk@xxxxxxx>
- Delivery-date: Thu, 22 Jan 2026 16:50:25 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
pipeline:
https://gitlab.com/xen-project/people/agvallejo/xen/-/pipelines/2277124833
(pipeline differs with the CHANGELOG patch being separate. Nothing functional)
As discussed in a prior RFC
(https://lore.kernel.org/xen-devel/dc68b9ce-38aa-4949-b3e7-a7c0a7ee9a25@xxxxxxxxxx/)
this series drops cross-vendor support. It includes the policy check that
was there and adds this on top:
* Eliminates #UD handler when HVM_FEP is disabled.
* Removes the cross-vendor checks from MSR handlers.
* Eliminate Intel-behaviour hacks for SYSENTER on AMD handlers and drop
intercept for SYSENTER.
Open question unrelated to the series: Does it make sense to conditionalise the
MSR handlers for non intercepted MSRs on HVM_FEP?
Cheers,
Alejandro
Alejandro Vallejo (4):
x86: Reject CPU policies with vendors other than the host's
x86/hvm: Disable non-FEP cross-vendor handling in #UD handler
x86/hvm: Remove cross-vendor checks from MSR handlers.
x86/svm: Drop emulation of Intel's SYSENTER behaviour
CHANGELOG.md | 4 +++
xen/arch/x86/hvm/hvm.c | 25 +++----------
xen/arch/x86/hvm/svm/svm.c | 46 +++++++++++-------------
xen/arch/x86/hvm/svm/vmcb.c | 3 ++
xen/arch/x86/hvm/vmx/vmx.c | 4 +--
xen/arch/x86/include/asm/hvm/svm-types.h | 10 ------
xen/arch/x86/msr.c | 6 ++--
xen/lib/x86/policy.c | 3 +-
8 files changed, 38 insertions(+), 63 deletions(-)
base-commit: 3001d9a19592bb4f12dab33f161ab2148513e30a
--
2.43.0
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