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Re: [PATCH 1/6] PCI: determine whether a device has extended config space


  • To: Teddy Astie <teddy.astie@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Wed, 7 Jan 2026 11:26:54 +0100
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  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stewart Hildebrand <stewart.hildebrand@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Wed, 07 Jan 2026 10:27:19 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 07.01.2026 11:00, Teddy Astie wrote:
> Le 06/01/2026 à 14:50, Jan Beulich a écrit :
>> --- a/xen/drivers/passthrough/pci.c
>> +++ b/xen/drivers/passthrough/pci.c
>> @@ -310,6 +310,41 @@ static void apply_quirks(struct pci_dev
>>                * from trying to size the BARs or add handlers to trap 
>> accesses.
>>                */
>>               pdev->ignore_bars = true;
>> +
>> +    if ( pdev->ext_cfg )
>> +    {
>> +        unsigned int pos;
>> +
>> +        /*
>> +         * PCI Express to PCI/PCI-X Bridge Specification, rev 1.0, 4.1.4 
>> says
>> +         * that when forwarding a type1 configuration request the bridge 
>> must
>> +         * check that the extended register address field is zero.  The 
>> bridge
>> +         * is not permitted to forward the transactions and must handle it 
>> as
>> +         * an Unsupported Request.  Some bridges do not follow this rule and
>> +         * simply drop the extended register bits, resulting in the standard
>> +         * config space being aliased, every 256 bytes across the entire
>> +         * configuration space.  Test for this condition by comparing the 
>> first
>> +         * dword of each potential alias to the vendor/device ID.
>> +         * Known offenders:
>> +         *   ASM1083/1085 PCIe-to-PCI Reversible Bridge (1b21:1080, rev 01 
>> & 03)
>> +         *   AMD/ATI SBx00 PCI to PCI Bridge (1002:4384, rev 40)
>> +         */
>> +        for ( pos = PCI_CFG_SPACE_SIZE;
>> +              pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE )
>> +        {
>> +            if ( pci_conf_read16(pdev->sbdf, pos) != vendor ||
>> +                 pci_conf_read16(pdev->sbdf, pos + 2) != device )
>> +                break;
>> +        }
>> +
>> +        if ( pos >= PCI_CFG_SPACE_EXP_SIZE )
>> +        {
>> +            printk(XENLOG_WARNING
>> +                   "%pp: extended config space aliases base one\n",
>> +                   &pdev->sbdf);
>> +            pdev->ext_cfg = false;
>> +        }
>> +    }
> 
> Given that it only appears to be the case for PCIe to PCI/PCI-X bridges, 
> do we want to check this for all devices ?

Yes. Bridges are only the main examples, but in the few systems I tested this
on so far I have at least one ordinary device which also aliases base config
space. Also note that Linux, where the base logic is taken from, also doesn't
restrict this checking (if I'm reading the code right).

Jan



 


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