[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 15/22] x86/traps: Introduce opt_fred
... disabled by default. There is a lot of work before FRED can be enabled by default. One part of FRED, the LKGS (Load Kernel GS) instruction, is enumerated separately but is mandatory as FRED disallows the SWAPGS instruction. Therefore, both CPUID bits must be checked. FRED formally removes the use of Ring1 and Ring2, meaning we cannot run 32bit PV guests. Therefore, don't enable FRED by default in shim mode. OTOH, if FRED is active, then PV32 needs disabling like with CET. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> --- docs/misc/xen-command-line.pandoc | 10 ++++++++++ xen/arch/x86/include/asm/traps.h | 4 ++++ xen/arch/x86/traps-setup.c | 31 +++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6865a61220ca..f293d973a8e8 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1283,6 +1283,16 @@ requirement can be relaxed. This option is particularly useful for nested virtualization, to allow the L1 hypervisor to use EPT even if the L0 hypervisor does not provide `VM_ENTRY_LOAD_GUEST_PAT`. +### fred (x86) +> `= <bool>` + +> Default: `false` + +Flexible Return and Event Delivery is an overhaul of interrupt, exception and +system call handling, fixing many corner cases in the x86 architecture, and +expected in hardware from 2025. Support in Xen is a work in progress and +disabled by default. + ### gnttab > `= List of [ max-ver:<integer>, transitive=<bool>, transfer=<bool> ]` diff --git a/xen/arch/x86/include/asm/traps.h b/xen/arch/x86/include/asm/traps.h index 6ae451d3fc70..73097e957d05 100644 --- a/xen/arch/x86/include/asm/traps.h +++ b/xen/arch/x86/include/asm/traps.h @@ -7,6 +7,10 @@ #ifndef ASM_TRAP_H #define ASM_TRAP_H +#include <xen/types.h> + +extern int8_t opt_fred; + void bsp_early_traps_init(void); void traps_init(void); void bsp_traps_reinit(void); diff --git a/xen/arch/x86/traps-setup.c b/xen/arch/x86/traps-setup.c index 37202c17fcea..3b5e4969a375 100644 --- a/xen/arch/x86/traps-setup.c +++ b/xen/arch/x86/traps-setup.c @@ -9,6 +9,8 @@ #include <asm/endbr.h> #include <asm/idt.h> #include <asm/msr.h> +#include <asm/pv/domain.h> +#include <asm/pv/shim.h> #include <asm/shstk.h> #include <asm/stubs.h> #include <asm/traps.h> @@ -20,6 +22,9 @@ unsigned int __ro_after_init ler_msr; static bool __initdata opt_ler; boolean_param("ler", opt_ler); +int8_t __ro_after_init opt_fred = 0; /* -1 when supported. */ +boolean_param("fred", opt_fred); + void nocall entry_PF(void); void nocall lstar_enter(void); void nocall cstar_enter(void); @@ -305,6 +310,32 @@ void __init traps_init(void) /* Replace early pagefault with real pagefault handler. */ _update_gate_addr_lower(&bsp_idt[X86_EXC_PF], entry_PF); + if ( !cpu_has_fred || !cpu_has_lkgs ) + { + if ( opt_fred ) + printk(XENLOG_WARNING "FRED not available, ignoring\n"); + opt_fred = false; + } + + if ( opt_fred == -1 ) + opt_fred = !pv_shim; + + if ( opt_fred ) + { +#ifdef CONFIG_PV32 + if ( opt_pv32 ) + { + opt_pv32 = 0; + printk(XENLOG_INFO "Disabling PV32 due to FRED\n"); + } +#endif + printk("Using FRED event delivery\n"); + } + else + { + printk("Using IDT event delivery\n"); + } + load_system_tables(); init_ler(); -- 2.39.5
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