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Re: [PATCH v8] xen/arm: pci: introduce PCI_PASSTHROUGH Kconfig option


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Stewart Hildebrand <stewart.hildebrand@xxxxxxx>
  • Date: Wed, 23 Jul 2025 18:16:38 -0400
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  • Cc: Rahul Singh <rahul.singh@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, "Volodymyr Babchuk" <Volodymyr_Babchuk@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <stefano.stabellini@xxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Wed, 23 Jul 2025 22:17:12 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 7/23/25 10:59, Jan Beulich wrote:
> On 23.07.2025 16:26, Stewart Hildebrand wrote:
>> On 7/23/25 06:18, Jan Beulich wrote:
>>> On 13.06.2025 17:17, Stewart Hildebrand wrote:
>>>> --- a/xen/arch/arm/Kconfig
>>>> +++ b/xen/arch/arm/Kconfig
>>>> @@ -8,6 +8,8 @@ config ARM_64
>>>>    depends on !ARM_32
>>>>    select 64BIT
>>>>    select HAS_FAST_MULTIPLY
>>>> +  select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH
>>>> +  select HAS_PASSTHROUGH if PCI_PASSTHROUGH
>>>
>>> As I just learned, this change (or maybe it was the "select HAS_PCI"
>>> further down) has exposed the quarantining Kconfig option prompt, which
>>> (aiui) is entirely meaningless on Arm. IOW I think further adjustments
>>> are necessary.
>>
>> Not entirely meaningless - the choice between "none" and "basic" still
>> seems relevant. Just "scratch page" quarantining hasn't been implemented
>> in any of the Arm iommu drivers.
> 
> Is there support for "basic"? For x86, most of the involved code lives
> in the vendor-specific drivers, and I can't find anything related in
> Arm's. Note in particular the hook iommu_quarantine_dev_init() calls,
> which isn't provided by any of the Arm drivers afaict.

Quoting xen/drivers/passthrough/Kconfig IOMMU_QUARANTINE_* help text:

"... basic form, all in-flight DMA will simply be forced to encounter
IOMMU faults."

My understanding of "basic" is that after destruction of a domU with a
PCI device assigned, the PCI device gets assigned to domIO. We have
special casing for ( d == dom_io ) in some instances, but otherwise it
has relatively little to do with the individual iommu drivers. I believe
assigning to domIO should be enough for the Arm iommus to generate
faults, since the iommu identifies the PCI device's DMA via sideband
information (AXI stream ID).



 


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