[XEN PATCH v2 2/5] x86/amd: configurable handling of AMD-specific MSRs access

[Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>]

Do not compile handlers of guest access to AMD-specific MSRs when CONFIG_AMD=n.

Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>
CC: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/msr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 289cf10b78..4567de7fc8 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -219,6 +219,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         *val = msrs->tsc_aux;
         break;
 
+#ifdef CONFIG_AMD
     case MSR_K8_SYSCFG:
     case MSR_K8_TOP_MEM1:
     case MSR_K8_TOP_MEM2:
@@ -281,6 +282,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
                                    ? 0 : (msr - MSR_AMD64_DR1_ADDRESS_MASK + 
1),
                                    ARRAY_SIZE(msrs->dr_mask))];
         break;
+#endif /* CONFIG_AMD */
 
         /*
          * TODO: Implement when we have better topology representation.
@@ -552,6 +554,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
             wrmsr_tsc_aux(val);
         break;
 
+#ifdef CONFIG_AMD
     case MSR_VIRT_SPEC_CTRL:
         if ( !cp->extd.virt_ssbd )
             goto gp_fault;
@@ -598,6 +601,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
         if ( v == curr && (curr->arch.dr7 & DR7_ACTIVE_MASK) )
             wrmsrl(msr, val);
         break;
+#endif /* CONFIG_AMD */
 
     default:
         return X86EMUL_UNHANDLEABLE;
-- 
2.25.1