/* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20220331 (64-bit version) * Copyright (c) 2000 - 2022 Intel Corporation * * Disassembling to symbolic ASL+ operators * * Disassembly of ssdt14.dat, Tue Jul 9 08:32:00 2024 * * Original Table Header: * Signature "SSDT" * Length 0x00000632 (1586) * Revision 0x02 * Checksum 0xB8 * OEM ID "LENOVO" * OEM Table ID "Tpm2Tabl" * OEM Revision 0x00001000 (4096) * Compiler ID "INTL" * Compiler Version 0x20180313 (538444563) */ DefinitionBlock ("", "SSDT", 2, "LENOVO", "Tpm2Tabl", 0x00001000) { Scope (\_SB) { Device (TPM) { Name (_HID, "NTC0702") // _HID: Hardware ID Noop Name (_CID, "MSFT0101" /* TPM 2.0 Security Device */) // _CID: Compatible ID Name (_STR, Unicode ("TPM 2.0 Device")) // _STR: Description String OperationRegion (SMIP, SystemIO, 0xB0, 0x01) Field (SMIP, ByteAcc, NoLock, Preserve) { IOPN, 8 } OperationRegion (TPMR, SystemMemory, 0xFED40000, 0x5000) Field (TPMR, AnyAcc, NoLock, Preserve) { ACC0, 8, Offset (0x08), INTE, 32, INTV, 8, Offset (0x10), INTS, 32, INTF, 32, STS0, 32, Offset (0x24), FIFO, 32, Offset (0x30), TID0, 32 } OperationRegion (TNVS, SystemMemory, 0x1BAF7000, 0x2F) Field (TNVS, AnyAcc, NoLock, Preserve) { PPIN, 8, PPIP, 32, PPRP, 32, PPRQ, 32, PPRM, 32, LPPR, 32, FRET, 32, MCIN, 8, MCIP, 32, MORD, 32, MRET, 32, UCRQ, 32, IRQN, 32, SFRB, 8 } Name (RESS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, ) { 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, 0x00000008, 0x00000009, 0x0000000A, } }) Name (RESL, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, ) { 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 0x00000006, 0x00000007, 0x00000008, 0x00000009, 0x0000000A, 0x0000000B, 0x0000000C, 0x0000000D, 0x0000000E, 0x0000000F, } }) Name (RES0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y00) { 0x0000000C, } }) Name (RES1, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If ((IRQN == 0x00)) { Return (RES1) /* \_SB_.TPM_.RES1 */ } Else { CreateDWordField (RES0, \_SB.TPM._Y00._INT, LIRQ) // _INT: Interrupts LIRQ = IRQN /* \_SB_.TPM_.IRQN */ Return (RES0) /* \_SB_.TPM_.RES0 */ } } Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { If ((IRQN != 0x00)) { CreateDWordField (Arg0, 0x11, IRQ0) CreateDWordField (RES0, \_SB.TPM._Y00._INT, LIRQ) // _INT: Interrupts LIRQ = IRQ0 /* \_SB_.TPM_._SRS.IRQ0 */ IRQN = IRQ0 /* \_SB_.TPM_._SRS.IRQ0 */ CreateBitField (Arg0, 0x79, ITRG) CreateBitField (RES0, \_SB.TPM._Y00._HE, LTRG) // _HE_: High-Edge LTRG = ITRG /* \_SB_.TPM_._SRS.ITRG */ CreateBitField (Arg0, 0x7A, ILVL) CreateBitField (RES0, \_SB.TPM._Y00._LL, LLVL) // _LL_: Low Level LLVL = ILVL /* \_SB_.TPM_._SRS.ILVL */ If ((((TID0 & 0x0F) == 0x00) || ((TID0 & 0x0F ) == 0x0F))) { If ((IRQ0 < 0x10)) { INTV = (IRQ0 & 0x0F) } If ((ITRG == 0x01)) { INTE |= 0x10 } Else { INTE &= 0xFFFFFFEF } If ((ILVL == 0x00)) { INTE |= 0x08 } Else { INTE &= 0xFFFFFFF7 } } } } Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings { If ((IRQN == 0x00)) { Return (RES1) /* \_SB_.TPM_.RES1 */ } ElseIf ((SFRB == 0x00)) { Return (RESL) /* \_SB_.TPM_.RESL */ } Else { Return (RESS) /* \_SB_.TPM_.RESS */ } } Method (PTS, 1, Serialized) { If (((Arg0 < 0x06) && (Arg0 > 0x03))) { If (!(MORD & 0x10)) { MCIP = 0x02 IOPN = MCIN /* \_SB_.TPM_.MCIN */ } } Return (0x00) } Method (_STA, 0, NotSerialized) // _STA: Status { If ((ACC0 == 0xFF)) { Return (0x00) } Return (0x0F) } Method (HINF, 1, Serialized) { Switch (ToInteger (Arg0)) { Case (0x00) { Return (Buffer (0x01) { 0x03 // . }) } Case (0x01) { Name (TPMV, Package (0x02) { 0x01, Package (0x02) { 0x02, 0x00 } }) If ((_STA () == 0x00)) { Return (Package (0x01) { 0x00 }) } Return (TPMV) /* \_SB_.TPM_.HINF.TPMV */ } Default { BreakPoint } } Return (Buffer (0x01) { 0x00 // . }) } Name (TPM2, Package (0x02) { Zero, Zero }) Name (TPM3, Package (0x03) { Zero, Zero, Zero }) Method (TPPI, 2, Serialized) { Switch (ToInteger (Arg0)) { Case (0x00) { Return (Buffer (0x02) { 0xFF, 0x01 // .. }) } Case (0x01) { Return ("1.3") } Case (0x02) { PPRQ = DerefOf (Arg1 [0x00]) PPRM = 0x00 PPIP = 0x02 IOPN = PPIN /* \_SB_.TPM_.PPIN */ Return (FRET) /* \_SB_.TPM_.FRET */ } Case (0x03) { TPM2 [0x01] = PPRQ /* \_SB_.TPM_.PPRQ */ Return (TPM2) /* \_SB_.TPM_.TPM2 */ } Case (0x04) { Return (0x02) } Case (0x05) { PPIP = 0x05 IOPN = PPIN /* \_SB_.TPM_.PPIN */ TPM3 [0x01] = LPPR /* \_SB_.TPM_.LPPR */ TPM3 [0x02] = PPRP /* \_SB_.TPM_.PPRP */ Return (TPM3) /* \_SB_.TPM_.TPM3 */ } Case (0x06) { Return (0x03) } Case (0x07) { PPIP = 0x07 PPRQ = DerefOf (Arg1 [0x00]) PPRM = 0x00 If ((PPRQ == 0x17)) { PPRM = DerefOf (Arg1 [0x01]) } IOPN = PPIN /* \_SB_.TPM_.PPIN */ Return (FRET) /* \_SB_.TPM_.FRET */ } Case (0x08) { PPIP = 0x08 UCRQ = DerefOf (Arg1 [0x00]) IOPN = PPIN /* \_SB_.TPM_.PPIN */ Return (FRET) /* \_SB_.TPM_.FRET */ } Default { BreakPoint } } Return (0x01) } Method (TMCI, 2, Serialized) { Switch (ToInteger (Arg0)) { Case (0x00) { Return (Buffer (0x01) { 0x03 // . }) } Case (0x01) { MORD = DerefOf (Arg1 [0x00]) MCIP = 0x01 IOPN = MCIN /* \_SB_.TPM_.MCIN */ Return (MRET) /* \_SB_.TPM_.MRET */ } Default { BreakPoint } } Return (0x01) } Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { If ((Arg0 == ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8") /* Unknown UUID */)) { Return (HINF (Arg2)) } If ((Arg0 == ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */)) { Return (TPPI (Arg2, Arg3)) } If ((Arg0 == ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d") /* Unknown UUID */)) { Return (TMCI (Arg2, Arg3)) } Return (Buffer (0x01) { 0x00 // . }) } } } }