[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [XEN PATCH v2] x86/intel: optional build of TSX support
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Sergiy Kibrik <sergiy_kibrik@xxxxxxxx>
- Date: Tue, 9 Jul 2024 11:48:56 +0300
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=oYFsTmprzQJOjUQ4ANJuZIhxXIQW9AFF7Y00DBCxNqw=; b=lj44rQGTzJwdpPKJIX3jomhqv6YgV6TT9jysba9F/LY6U5+orKPZNjX34f3FuyXiuJ5yOR27RnqAfKarTBAoZWd/iPoCGE4/VBOPvfEcw62LPW2nIIw4mLM0mtSQnK+sbns/ST7IRkJsrdc/YMZf/z0Ckmn0cleZTegDpMBEcgcogkn0qV7x3uzgh+xx5gCf1B3CCkgxvjffwazmpaQtF7L29VgzTyuDxSwFhdL59fdEWUNE9KUntZ4J68f33NE2IIYuDbEcoG18tgg3dagxVRgDfxHv96uU9rf7DVpaauU8MUI0Jo51yVOliUKFfLveRISREZHXelB0b6kmbLCTXA==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YT4NeGaL5b5PhdE7+8pvco7LD8tqAxnRNWjeprRIRRG7a7VkqM9ABDPbdajOhOs4qEZ0LsvCecwrBu1hkVvRq3JBRK7HO2SIjVJaf7SHug8ktz5orE4ioAUilbn30ew8w9JXn1gMGjCaBRqtpmcuAe9l3I5Zhn6GP7NQto+sPMJayC8ThpVj6LMeTqyOx1bv+e9MWsW1uKJz8+0UdDgsNxaqaj83p+zYrcDrk/bd8ob/SXEe27rhNgZEhvDbc6Gvb2ou7bcNWnrWBa2erY/f3+6994oVDaT57vt2W6Jj8EaMTquSe9h2dz3o8zhXcpZZqbVmk5kZL1e+iA8wGWSVyQ==
- Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx, Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Delivery-date: Tue, 09 Jul 2024 08:49:22 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
03.07.24 17:58, Jan Beulich:
On 01.07.2024 10:25, Sergiy Kibrik wrote:
Transactional Synchronization Extensions are supported on certain Intel's
CPUs only, hence can be put under CONFIG_INTEL build option.
The whole TSX support, even if supported by CPU, may need to be disabled via
options, by microcode or through spec-ctrl, depending on a set of specific
conditions. To make sure nothing gets accidentally runtime-broken all
modifications of global TSX configuration variables is secured by #ifdef's,
while variables themselves redefined to 0, so that ones can't mistakenly be
written to.
Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
Btw - any reason you didn't Cc Roger?
oops, forgot to run add_maintainers.pl..
cc Roger
-Sergiy
|
