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Re: [PATCH v1 01/14] xen/riscv: add _zicsr to CFLAGS
- To: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- Date: Fri, 20 Jan 2023 15:29:37 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHZLN/sD4BhGIHIWE+hX+U44mzDDK6nbkKA
- Thread-topic: [PATCH v1 01/14] xen/riscv: add _zicsr to CFLAGS
On 20/01/2023 2:59 pm, Oleksii Kurochko wrote:
> Work with some registers requires csr command which is part of
> Zicsr.
>
> Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
> ---
> xen/arch/riscv/arch.mk | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk
> index 012dc677c3..95b41d9f3e 100644
> --- a/xen/arch/riscv/arch.mk
> +++ b/xen/arch/riscv/arch.mk
> @@ -10,7 +10,7 @@ riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
> # into the upper half _or_ the lower half of the address space.
> # -mcmodel=medlow would force Xen into the lower half.
>
> -CFLAGS += -march=$(riscv-march-y) -mstrict-align -mcmodel=medany
> +CFLAGS += -march=$(riscv-march-y)_zicsr -mstrict-align -mcmodel=medany
Should we just go straight for G, rather than bumping it along every
time we make a tweak?
~Andrew
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