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Re: [PATCH v2 6/8] x86/hvm: Enable guest access to MSR_PKRS
- To: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- Date: Tue, 10 Jan 2023 18:07:39 +0000
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- Cc: Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHZJReeV/6Z/BfYW0W8YgpP3+cAB66X8qqA
- Thread-topic: [PATCH v2 6/8] x86/hvm: Enable guest access to MSR_PKRS
On 10/01/2023 5:18 pm, Andrew Cooper wrote:
> Have guest_{rd,wr}msr(), via hvm_{get,set}_reg(), access either the live
> register, or stashed state, depending on context. Include MSR_PKRS for
> migration, and let the guest have full access.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
> ---
> CC: Jan Beulich <JBeulich@xxxxxxxx>
> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> CC: Wei Liu <wl@xxxxxxx>
> CC: Kevin Tian <kevin.tian@xxxxxxxxx>
>
> v2:
> * Rebase over the get/set_reg() infrastructure.
> ---
> xen/arch/x86/hvm/hvm.c | 1 +
> xen/arch/x86/hvm/vmx/vmx.c | 17 +++++++++++++++++
> xen/arch/x86/msr.c | 10 ++++++++++
> 3 files changed, 28 insertions(+)
>
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 927a221660e8..c6c1eea18003 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -1333,6 +1333,7 @@ static int cf_check hvm_load_cpu_xsave_states(
> static const uint32_t msrs_to_send[] = {
> MSR_SPEC_CTRL,
> MSR_INTEL_MISC_FEATURES_ENABLES,
> + MSR_PKRS,
> MSR_IA32_BNDCFGS,
> MSR_IA32_XSS,
> MSR_VIRT_SPEC_CTRL,
Needs the following hunk too:
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index c6c1eea18003..86cab7aa2627 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1487,6 +1487,7 @@ static int cf_check hvm_load_cpu_msrs(struct
domain *d, hvm_domain_context_t *h)
case MSR_SPEC_CTRL:
case MSR_INTEL_MISC_FEATURES_ENABLES:
+ case MSR_PKRS:
case MSR_IA32_BNDCFGS:
case MSR_IA32_XSS:
case MSR_VIRT_SPEC_CTRL:
for the receive side of migration to work.
~Andrew
|
