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[PATCH 0/2] x86/vmx: Don't crash guests when there is no model-specific LBRs available
- To: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- Date: Mon, 9 Jan 2023 12:08:26 +0000
- Authentication-results: esa3.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Jun Nakajima <jun.nakajima@xxxxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>
- Delivery-date: Mon, 09 Jan 2023 12:08:38 +0000
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- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
This is the minimum bodge required to stop guests crashing on Sapphire Rapids
hardware.
Note that both Arch LBR and safely (in terms of migration) enumerating
PDCM/MSR_PERF_CAPS depend on improved MSR levelling support which is still not
yet complete.
i.e. We cannot do the second half (enumerating LBR_FORMAT=0x3f) yet because
we'll make it more likely for VMs to crash in migrate.
Andrew Cooper (2):
x86/vmx: Calculate model-specific LBRs once at start of day
x86/vmx: Support for CPUs without model-specific LBR
xen/arch/x86/hvm/vmx/vmx.c | 307 +++++++++++++++++++++++----------------------
1 file changed, 155 insertions(+), 152 deletions(-)
--
2.11.0
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