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Re: [PATCH] x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
- To: Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
- Date: Mon, 13 Jun 2022 08:03:24 +0000
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- Cc: Roger Pau Monne <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Mon, 13 Jun 2022 08:03:42 +0000
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- Thread-topic: [PATCH] x86/spec-ctrl: More MSR_ARCH_CAPS enumerations
On 13/06/2022 08:46, Jan Beulich wrote:
> On 10.06.2022 19:13, Andrew Cooper wrote:
>> On 10/06/2022 17:00, Andrew Cooper wrote:
>>> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html
>>> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/running-average-power-limit-energy-reporting.html
>>>
>>> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>>> ---
>>> CC: Jan Beulich <JBeulich@xxxxxxxx>
>>> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
>>> CC: Wei Liu <wl@xxxxxxx>
>>>
>>> The SDM also lists
>>>
>>> #define ARCH_CAPS_OVERCLOCKING_STATUS (_AC(1, ULL) << 23)
>>>
>>> but I've got no idea what this is, nor the index of MSR_OVERCLOCKING_STATUS
>>> which is the thing allegedly enumerated by this.
>>
>> Found it. There's an OVER{C}CLOCKING typo in the SDM. It's MSR 0x195
>> and new in AlderLake it seems.
> With or without bits for it added
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
> I'd like to note though that I can't spot such a spelling mistake in version
> 077 of the SDM (vol 4).
That's because it's surprisingly hard to deliberately make a typo...
It was OVER LOCKING i.e. no c's rather than 2.
~Andrew
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