[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3] x86/msr: handle reads to MSR_P5_MC_{ADDR,TYPE}


  • To: Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Thu, 28 Apr 2022 13:39:22 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ALl+eZdq6+PE9Lary6hVHXdG015SneK6tZ0GF3LsgOk=; b=GigG5yzrF6RYJg1nX0rd1RYOsa3uDzy00ttMxPumVKQchNzxcHktH2buJfMSAJzK/q/0P3S4g1tcInPJDllxdcempLp6Ft0ohvT8J+QyHQGSWwRI0iZUi+RyuCDDloUt0Rk+SLanUG6dNecBpOUYt0hTqS2CKRntD/Rxm7JOa0Mk5X/qRkUkcqDgfsAEnI/yAyFzWNHyznfCCGyrqRbvBVazAP2lie70OMyP7OPQhahMhH3YDRYBKFp3BlwxxmbKaSGXLfPpFdqg+N8W+v8+ocY0G87XwXWRmKOrW23Tf84UXO1ePkPyirnmllmgb6SZC6Otlf4BMmCn85mMa4rGGg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QokDpTDAwlrAIyUOIyNszEioRRRW8NS8CKo2Bka8ljK/eKvs1mSdwbP6Cb5O5WID8Vq/iP75kCQTYDL13Ma17Mq2yQroAujVBny/SbN586HTWx4rZAKXGbFnXtucqBvSZhHo9wnnKRiq1YnngdFyqEHhXtcZjXiy1K1G0hr86HdF0UIdmJuzCXm7OX0PwM3lqIwZydXNIyJYpPVLXcUu7Q1LsgsJ+pNIECshcTf7NJedWsi1yTwgZQO2s+2QKKAkxDH0ykYLzvjMRnlguocY6Ng9dapNXjrCv31plBWEG6WoC5ZdR3QgEmIyPnMrQr2xRmo1SHLu++9REgL8zuwkmg==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Steffen Einsle <einsle@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Thu, 28 Apr 2022 11:39:37 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 28.04.2022 13:20, Roger Pau Monne wrote:
> Windows Server 2019 Essentials will unconditionally attempt to read
> P5_MC_ADDR MSR at boot and throw a BSOD if injected a #GP.
> 
> Fix this by mapping MSR_P5_MC_{ADDR,TYPE} to
> MSR_IA32_MCi_{ADDR,STATUS}, as reported also done by hardware in Intel
> SDM "Mapping of the Pentium Processor Machine-Check Errors to the
> Machine-Check Architecture" section.
> 
> Reported-by: Steffen Einsle <einsle@xxxxxxxxxx>
> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.