[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH 3/3] VT-d: shorten vtd_flush_{context,iotlb}_reg()


  • To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Thu, 9 Dec 2021 16:53:46 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8gDGJGQ3q/kpTI39nNO6K9uOCAOBK2KpkmRZMpGfFgk=; b=OS78/GKHVSCFKaoFfvtYx4qp2ubPgc9JErZP2NGrwxEO89jE+ByYdHchaNlWAgLpM9iqFK7SJpm7kfo4xvKt+DuQGcwnhPblyH2e2jMf3KwZaQs6hioyf0n4TK8uHnBeSfwBxXXfCbapzyy8utvKU/9I2IEaiPpKq5qj3VlcvrPfInNlkmrJ5uVlDaWKDt6ge68vOjNqoCKRgUahHJpGyAXC6EDVU7WerVoZmYYyZOGOddqeuvO+EQmO9I7v1AECjlR7vGWJHy/9HW7uv3P/pj1o0xtilA8mQv3rqOOm4pbUgAWRsbCNWhdswXUqIbhGbnsjZig/cMgeFJRhduxYFg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=UWLzl1zyjuVeYIx2feedc+vlvBNl5RWnqFc9aFH2Xm2/0OarYuQrhFQD0una6cbAQK7F0tPxTK9+la2HV6ZwEtp9szsMYcerNRm02kP6LWGWfY/QowYMeWBTc2TEixukADt36ANU6oVO2EO7BD3skZLX4Qf+moImlAP8gOnFkcNDdtgllfUlDszOQ0ryO3brG87jOWUV3QYFg++Jy95kEG81GrUbvYuJA8ZnP4d/5hmytiIrX7cUp3bJGxC40K3EoQ17i6yhbbcsMjTeANVJR5u392wnwMBEwVQOQZs6X9LR1mnx00n+nV51y88ZWY823mODFWqSKiB6toft3O+fSw==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
  • Cc: Kevin Tian <kevin.tian@xxxxxxxxx>
  • Delivery-date: Thu, 09 Dec 2021 15:53:57 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Their calculations of the value to write to the respective command
register can be partly folded, resulting in almost 100 bytes less code
for these two relatively short functions.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -441,7 +441,6 @@ int vtd_flush_context_reg(struct vtd_iom
                           uint16_t source_id, uint8_t function_mask,
                           uint64_t type, bool flush_non_present_entry)
 {
-    u64 val = 0;
     unsigned long flags;
 
     /*
@@ -462,26 +461,26 @@ int vtd_flush_context_reg(struct vtd_iom
     switch ( type )
     {
     case DMA_CCMD_GLOBAL_INVL:
-        val = DMA_CCMD_GLOBAL_INVL;
-        break;
-    case DMA_CCMD_DOMAIN_INVL:
-        val = DMA_CCMD_DOMAIN_INVL|DMA_CCMD_DID(did);
         break;
+
     case DMA_CCMD_DEVICE_INVL:
-        val = DMA_CCMD_DEVICE_INVL|DMA_CCMD_DID(did)
-            |DMA_CCMD_SID(source_id)|DMA_CCMD_FM(function_mask);
+        type |= DMA_CCMD_SID(source_id) | DMA_CCMD_FM(function_mask);
+        fallthrough;
+    case DMA_CCMD_DOMAIN_INVL:
+        type |= DMA_CCMD_DID(did);
         break;
+
     default:
         BUG();
     }
-    val |= DMA_CCMD_ICC;
+    type |= DMA_CCMD_ICC;
 
     spin_lock_irqsave(&iommu->register_lock, flags);
-    dmar_writeq(iommu->reg, DMAR_CCMD_REG, val);
+    dmar_writeq(iommu->reg, DMAR_CCMD_REG, type);
 
     /* Make sure hardware complete it */
     IOMMU_FLUSH_WAIT("context", iommu, DMAR_CCMD_REG, dmar_readq,
-                     !(val & DMA_CCMD_ICC), val);
+                     !(type & DMA_CCMD_ICC), type);
 
     spin_unlock_irqrestore(&iommu->register_lock, flags);
     /* flush context entry will implicitly flush write buffer */
@@ -510,7 +509,7 @@ int vtd_flush_iotlb_reg(struct vtd_iommu
                         bool flush_non_present_entry, bool flush_dev_iotlb)
 {
     int tlb_offset = ecap_iotlb_offset(iommu->ecap);
-    u64 val = 0;
+    uint64_t val = type | DMA_TLB_IVT;
     unsigned long flags;
 
     /*
@@ -524,14 +523,13 @@ int vtd_flush_iotlb_reg(struct vtd_iommu
     switch ( type )
     {
     case DMA_TLB_GLOBAL_FLUSH:
-        val = DMA_TLB_GLOBAL_FLUSH|DMA_TLB_IVT;
         break;
+
     case DMA_TLB_DSI_FLUSH:
-        val = DMA_TLB_DSI_FLUSH|DMA_TLB_IVT|DMA_TLB_DID(did);
-        break;
     case DMA_TLB_PSI_FLUSH:
-        val = DMA_TLB_PSI_FLUSH|DMA_TLB_IVT|DMA_TLB_DID(did);
+        val |= DMA_TLB_DID(did);
         break;
+
     default:
         BUG();
     }




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.