[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v5 07/12] libs/guest: introduce helper set cpu topology in cpu policy


  • To: Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Mon, 6 Dec 2021 17:09:42 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gwHfPBo0d9s7C8a5NxcBva7KOBPhUBVBC5hZqQePnWw=; b=aG6eRdUeCMf19CYui0RhZQCqM6JMyQeUy5VYLlF3gQqVmsEwCk+3c/m9PJqw7AIl5WDU2ZvCh88B7+TlXqA32O3t5mBF5m252CNoDTrXxsx8DNcGOIt4XGt9jXQnG736oJJGK96vDu4IjABHJVxuRqqMlllrvp4VtTgOk86y+C7g/0gyF/nM0vlaEuI5dl3xC64iSrLvh0Qik6PQwCl55iYVajCgRUqtWvkJaHsqD9jmcC+SsG5DMd1qrPuvSsVqKEN4X2OaDIm9lhNUxDrl1H9oSgU9ixgfdqTO4MRnTdl7WIGDzwplV2PcpJZODx1gzO0j7L3fJsu29PcqfOJarA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bzD7jXEKwiy63JldO5/gySVXtRt5PyAflI3FeUarfG3LrrpSqz3zn1tsKOktgifJjay7Nyq8hp2wnxshOn0COPvhOPG8kox1JR47SFqwPCMUPsj5/knLn3wuzIgmtddJqKoPG15POAqcZC/9htEnOgVq1zCpwE8+XEDPDa9RQooxH975arVs9T9N10JaCgTY8Ba1Wy90WMnJqPQZ4KhzBdSviUbuECJ0wEzTNvWVZ5J5pomzNKzmemqY2EFvWnlsbDXnZo3JbXBe89SxDgJnf6nDqZy6T+R4IgKHOcv2QzQ6pY6ha5aFwp/5u2l6C7tA9+0jUtz4ydlEdh2i0BPMVw==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
  • Cc: Ian Jackson <iwj@xxxxxxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Juergen Gross <jgross@xxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Mon, 06 Dec 2021 16:09:59 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 29.11.2021 16:33, Roger Pau Monne wrote:
> @@ -458,22 +456,6 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t 
> domid, bool restore,
>           (p = calloc(1, sizeof(*p))) == NULL )
>          goto out;
>  
> -    /* Get the host policy. */
> -    rc = xc_get_cpu_featureset(xch, XEN_SYSCTL_cpu_featureset_host,
> -                               &len, host_featureset);

You go from retrieving the host featureset to ...

> @@ -944,3 +865,98 @@ int xc_cpu_policy_make_compat_4_12(xc_interface *xch, 
> xc_cpu_policy_t *policy,
>      xc_cpu_policy_destroy(host);
>      return rc;
>  }
> +
> +int xc_cpu_policy_legacy_topology(xc_interface *xch, xc_cpu_policy_t *policy,
> +                                  bool hvm)
> +{
> +    if ( !hvm )
> +    {
> +        xc_cpu_policy_t *host;
> +        int rc;
> +
> +        host = xc_cpu_policy_init();
> +        if ( !host )
> +        {
> +            errno = ENOMEM;
> +            return -1;
> +        }
> +
> +        rc = xc_cpu_policy_get_system(xch, XEN_SYSCTL_cpu_policy_host, host);

... retrieving the host policy, which afaict is a larger blob of data.
Is there a particular reason for doing so?

> +        if ( rc )
> +        {
> +            ERROR("Failed to get host policy");
> +            xc_cpu_policy_destroy(host);
> +            return rc;
> +        }
> +
> +
> +        /*
> +         * On hardware without CPUID Faulting, PV guests see real topology.
> +         * As a consequence, they also need to see the host htt/cmp fields.
> +         */
> +        policy->cpuid.basic.htt = host->cpuid.basic.htt;
> +        policy->cpuid.extd.cmp_legacy = host->cpuid.extd.cmp_legacy;
> +    }
> +    else
> +    {
> +        unsigned int i;
> +
> +        /*
> +         * Topology for HVM guests is entirely controlled by Xen.  For now, 
> we
> +         * hardcode APIC_ID = vcpu_id * 2 to give the illusion of no SMT.
> +         */
> +        policy->cpuid.basic.htt = true;
> +        policy->cpuid.extd.cmp_legacy = false;
> +
> +        /*
> +         * Leaf 1 EBX[23:16] is Maximum Logical Processors Per Package.
> +         * Update to reflect vLAPIC_ID = vCPU_ID * 2, but make sure to avoid
> +         * overflow.
> +         */
> +        if ( !policy->cpuid.basic.lppp )
> +            policy->cpuid.basic.lppp = 2;
> +        else if ( !(policy->cpuid.basic.lppp & 0x80) )
> +            policy->cpuid.basic.lppp *= 2;
> +
> +        switch ( policy->cpuid.x86_vendor )
> +        {
> +        case X86_VENDOR_INTEL:
> +            for ( i = 0; (policy->cpuid.cache.subleaf[i].type &&
> +                          i < ARRAY_SIZE(policy->cpuid.cache.raw)); ++i )
> +            {
> +                policy->cpuid.cache.subleaf[i].cores_per_package =
> +                  (policy->cpuid.cache.subleaf[i].cores_per_package << 1) | 
> 1;
> +                policy->cpuid.cache.subleaf[i].threads_per_cache = 0;
> +            }
> +            break;
> +
> +        case X86_VENDOR_AMD:
> +        case X86_VENDOR_HYGON:
> +            /*
> +             * Leaf 0x80000008 ECX[15:12] is ApicIdCoreSize.
> +             * Leaf 0x80000008 ECX[7:0] is NumberOfCores (minus one).
> +             * Update to reflect vLAPIC_ID = vCPU_ID * 2.  But avoid
> +             * - overflow,
> +             * - going out of sync with leaf 1 EBX[23:16],
> +             * - incrementing ApicIdCoreSize when it's zero (which changes 
> the
> +             *   meaning of bits 7:0).
> +             *
> +             * UPDATE: I addition to avoiding overflow, some

Nit: Would you mind switching "I" to "In" at this occasion?

Jan




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.