[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [PATCH 2/3] VT-d: correct off-by-1 in fault register range check


  • To: Jan Beulich <jbeulich@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
  • Date: Wed, 24 Nov 2021 01:23:32 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=DnGpOOW9MY3UKObvDa0TpCDhi/memOjYMSQ/gF8TW3c=; b=CWyM3+ND56oli6CYJLlNulVtmmLm3FN2I53DzuD2qQzMvj+VnlekSqtNQ13WGmtPa24bpbnhOZFgVnpeJKmfFjHifs/yQY1SRdTrM6Ru9HPNfEafKAwr3Lzp5zg3II6/JOx2TrSZJG1YsTbQZ5XhqEIPV6MbMLFFUBHC3Ly+3ervvlWWC7M14LLPjL3DMo4eNxl0615y9Vb02HQstqKtKpV5siodrWT41gdxR69jeCJHwwOCc9AKXJrkyEVaKizjJKR2XqHhxwhwALY5EeUCZYRYSadK5rAYohzL8epB6J8ibQgnmJgU7LStChOuLkRAEB4OEcxwVHsTaj2vfdnPsQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=avMY7VpRYXsNqzLEl92zzMMGT9PMW9si5shQNSrXa/mvVnr1EcRtrGDRFPj7UntS5FxkGGSn1gk5XhCDNIyuHBctncEq9GRvjm1m3fiQNeMGQT5qedkKVMEcN/Jb1DWqdYGA54GZghVF3aWrggftHY8EIhjUCbY2Wu8pKorN7pWzdyZI3jtoa27agcUQkpK31cn/15yOTJ/ZC1S73GP4tq6lMwi+yMcFwWIqLLytOjanKJblAbfJ4V10W2saY1HZ/mRm2JQtmtDqCG2IBYq+OnKOYEAHlUxNQ+T7R0cAQ02lfZHc5oLhR6/D7UDq0e7rqwCflZrTJUI/SV+5gZslig==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com;
  • Delivery-date: Wed, 24 Nov 2021 01:24:06 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHX4G+tcPZ6n1ych0OjZ1PkPCH9PKwR4tgQ
  • Thread-topic: [PATCH 2/3] VT-d: correct off-by-1 in fault register range check

> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: Tuesday, November 23, 2021 9:40 PM
> 
> All our present implementation requires is that the range fully fits
> in a single page. No need to exclude the case of the last register
> extending right to the end of that page.
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

> 
> --- a/xen/drivers/passthrough/vtd/iommu.c
> +++ b/xen/drivers/passthrough/vtd/iommu.c
> @@ -1229,7 +1229,7 @@ int __init iommu_alloc(struct acpi_drhd_
>      quirk_iommu_caps(iommu);
> 
>      if ( cap_fault_reg_offset(iommu->cap) +
> -         cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >=
> PAGE_SIZE ||
> +         cap_num_fault_regs(iommu->cap) * PRIMARY_FAULT_REG_LEN >
> PAGE_SIZE ||
>           ecap_iotlb_offset(iommu->ecap) >= PAGE_SIZE )
>      {
>          printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported\n");


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.