[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 3/3] AMD/IOMMU: iommu_enable vs iommu_intremap


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Wed, 3 Nov 2021 16:06:29 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6aL6lTGv6E9eqpavSlVAGx7/HH4bk1n+Bu4962vKDwE=; b=ZET3/9D9nbDWfkmTbHxjXiQpy05FuWWvPcbNGgOlrvk0n2IvVlIiz6fMnilsMxJnnvoZ8gdFrNr5qahzVJuuuxZNQmW/Uhf6MNTBtHCoZbrl6Eh+uGX/5ze4GXyGs58siphfZZl20TC19239jabfXqiz+Drk2/YQmY7Oa1o8BT8BqzOfYNDtdhXBdplLJ/hEZp/E/qEB7/QYzSyDteY2KIzY3UTLFCNIoL3w/WfBOydtupnOZk+LfXDGqGIrgmXAKafUUPZHB0Aj/e304OT0XgkbqsXEN5437LKplME15mIT/wtXqcgIK8sgGFquKjxQHkjXL/i5E0/zVQATTHyPTw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YW1j6RdE4LLzEmJ7HaBUCMIutVSmHhywLu3QpRXpEcZnl2IWkIxfWgKBZlZ8mwT2UvMkK8V+MPUmkfQVVRTxE8aqSs0aSzVHmOm52SbNUzjInqqimn8sAHpcW0C+I0DHsM9W10lAJ6RFmPOAdILxiIxNHw1EwEtqIbPeSWANVjXayZrIAh2jWcVDu0HQcUlcfrIfgvGbitZDSao3ArBu/fZ2YW6oUYiMvgR61DLsVJ5u1NpwOpo9l3vHUTHCYgk/yjj1hEdQ+++imAHKMjUUWjF28USOPwwcfHarOQre9/BdThu7XEluqlSotYzFdRbv5e1Q901icxu/RsIGezqa/Q==
  • Authentication-results: esa2.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
  • Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Paul Durrant <paul@xxxxxxx>
  • Delivery-date: Wed, 03 Nov 2021 15:06:55 +0000
  • Ironport-data: A9a23:tLIujKOUxv2i5tnvrR1JkMFynXyQoLVcMsEvi/4bfWQNrUok3zMEy jNNUGHQPvuMZ2Omfdh/bo+19UoB6sfVyddjHgto+SlhQUwRpJueD7x1DKtR0wB+jCHnZBg6h ynLQoCYdKjYdpJYz/uUGuCJQUNUjMlkfZKhTr6bUsxNbVU8En540Eo4w7VRbrNA2rBVPSvc4 bsenOWHULOV82Yc3rU8sv/rRLtH5ZweiRtA1rAMTakjUGz2zhH5OKk3N6CpR0YUd6EPdgKMq 0Qv+5nilo/R109F5tpICd8XeGVSKlLZFVDmZna7x8FOK/WNz8A/+v9TCRYSVatYowuuwNR79 /hIj52peCEVJKDrtOQ3DSANRkmSPYUekFPGCX22sMjVxEzaaXr8hf5pCSnaP6VBpLwxWzsXs 6VFdnZdNXhvhMrvqF6/YvNrick5atHiIasUu216zCGfBvEjKXzGa/iUtI4AhWxh7ixINe+BS fojUxR2UAvBWgFoZUkRK4Jig+j90xETdBUH8QnI9MLb+VP70whZwLXrdt3PdbSiXcxImm6Iq 2SA+H72ajkYPtGCzTuO8lq3m/TC2yj8Xeo6BLC+s/JnnlCX7mgSEwENE0u2p+GjjUyzUM4ZL FYbkhfCtoBrqhbtFIOkGUTl/jjU5XbwRua8DcUEz16JwJX55jyYH1kiciRMT/AmnpEPEGlCO kCyo/vlAjlmsbuwQH2b96uJoT7aBRX5PVPudgdfE1JbvoCLTJUby0uWE409SPLdYsjdQGmom 1i3QD4Ca6L/ZCLh/4Gy5hj5jj2lvfAlpSZlt1yMDgpJAu6UDbNJhrBEC3CHsp6sz67DFzFtW UTofeDEsoji6rnXxUSwrB0lRu3B2hp8GGS0baRTN5cg7S+x3HWoYJpd5jpzTG8wbJ1ZKWC5P heJ5VMOjHO2AJdMRfUpC25WI59ypZUM6Py/DqyEBjawSsEpHON4wM2eTRHJhD28+KTduao+J Y2aYa6R4YUyUsxaIM6Nb75Fi9cDn3lmrUuKHMyT50n3gNK2OS/OIZ9YYQTmUwzMxP7dyOkj2 40EbJXiJtQ2eLCWXxQ7BqZIcQtRdShnXsurwyGVH8baSjdb9KgaI6a56ZsqepB/nrQTkeHN/ 3qnXVRfxka5jnrCQThmoFg9AF82dZog/389IwI2OlOkhyoqbYq1tf9NfJorZ7g3sudkyKcsH fUCfsyBBNVJSyjGpGtBPcWs8tQ6eUT5nx+KMgqkfCM7I8xqSTvW94K2ZQDo7iQPUHa67JNsv 7262wrHapMfXAA+Xt3OYfeiwgrp73gQke5/RWXSJdxXdBm++YRmMXWp3PQ2P9sNOVPIwT7Dj 1SaBhIRpO/spY4p8YaW2fDY/tnxS+YnRxhUBWjW67qyJBL2xGv7zN8SSvuMcBDcSHjwpPeoa 9JKwqyuK/YAhltL7dZxSu450aIk6tLzjLZG1QA4Tm7TZlGmB748cHmL2c5D6v9EyrND4FbkX 0uO/p9ROKmTOdOjG1kUfVJ3YuOG3PASuz/T8fVqfxmquH4ppOKKARdIIh2BqC1BN78kYooqz NAotNMS9wHi2AEhNcyLj3wM+mmBRpDav37Lan3O7FfXtzcW
  • Ironport-hdrordr: A9a23:4/zXaaMQiFimf8BcTvujsMiBIKoaSvp037BL7SxMoHluGfBw+P rAoB1273HJYVQqOE3I6OrgBEDoexq1n/NICO8qTNWftWLdyQiVxe9ZnOzf6gylNyri9vNMkY dMGpIObuEY1GIK6PoSNjPId+od/A==
  • Ironport-sdr: q/Gse6JdY/NaniAM0Mv72YF1iRrhdM/zG+2JX8acIs4YXkNGeMw3wQwrXLS7KyUYPpAI5OGowV pDjZlq9l2Rme+h8vSXHdkUIwHyKlhUjGHqZJOuS5LHbnJpBD4bSlVuCSAx24NfIbWCsraPkxna r1y1itW4PzA2/NluzO6D6C8LDkgxvMq/zEzzOSj7cmHh4SUMQ9qkRyRh1DCxvfBN28D4rJXOOj iIT2+G5YdcqrNvmY5tQX4bfvK4OEeWAtO8tD3+VFyGsX+L14PuwjKZbg4bPNYpoee6GzkEKdiA Ba0L2s26b1Jk1DdeS4AyRsyB
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Wed, Nov 03, 2021 at 10:46:40AM +0100, Jan Beulich wrote:
> On 02.11.2021 12:03, Roger Pau Monné wrote:
> > On Tue, Nov 02, 2021 at 11:13:08AM +0100, Jan Beulich wrote:
> >> On 25.10.2021 12:28, Roger Pau Monné wrote:
> >>> On Thu, Oct 21, 2021 at 11:59:02AM +0200, Jan Beulich wrote:
> >>>> The two are really meant to be independent settings; iov_supports_xt()
> >>>> using || instead of && was simply wrong. The corrected check is,
> >>>> however, redundant, just like the (correct) one in iov_detect(): These
> >>>> hook functions are unreachable without acpi_ivrs_init() installing the
> >>>> iommu_init_ops pointer, which it does only upon success. (Unlike for
> >>>> VT-d there is no late clearing of iommu_enable due to quirks, and any
> >>>> possible clearing of iommu_intremap happens only after iov_supports_xt()
> >>>> has run.)
> >>>>
> >>>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> >>>> ---
> >>>> In fact in iov_detect() it could be iommu_enable alone which gets
> >>>> checked, but this felt overly aggressive to me. Instead I'm getting the
> >>>> impression that the function may wrongly not get called when "iommu=off"
> >>>> but interrupt remapping is in use: We'd not get the interrupt handler
> >>>> installed, and hence interrupt remapping related events would never get
> >>>> reported. (Same on VT-d, FTAOD.)
> >>>
> >>> I've spend a non-trivial amount of time looking into this before
> >>> reading this note. AFAICT you could set iommu=off and still get x2APIC
> >>> enabled and relying on interrupt remapping.
> >>
> >> Right, contrary to ...
> >>
> >>>> For iov_supports_xt() the question is whether, like VT-d's
> >>>> intel_iommu_supports_eim(), it shouldn't rather check iommu_intremap
> >>>> alone (in which case it would need to remain a check rather than getting
> >>>> converted to ASSERT()).
> >>>
> >>> Hm, no, I don't think so. I think iommu_enable should take precedence
> >>> over iommu_intremap, and having iommu_enable == false should force
> >>> interrupt remapping to be reported as disabled. Note that disabling it
> >>> in iommu_setup is too late, as the APIC initialization will have
> >>> already taken place.
> >>>
> >>> It's my reading of the command line parameter documentation that
> >>> setting iommu=off should disable all usage of the IOMMU, and that
> >>> includes the interrupt remapping support (ie: a user should not need
> >>> to set iommu=off,no-intremap)
> >>
> >> ... that documentation. But I think it's the documentation that
> >> wants fixing, such that iommu=off really only control DMA remap.
> > 
> > IMO I think it's confusing to have sub-options that could be enabled
> > when you set the global one to off. I would expect `iommu=off` to
> > disable all the iommu related options, and I think it's fair for
> > people to expect that behavior.
> 
> It occurs to me that this reply of yours here contradicts your R-b
> on patch 1, in particular with its revision log saying:
> 
> v2: Treat iommu_enable and iommu_intremap as separate options.

Right, I see. patch 1 uses

if ( !iommu_enable && !iommu_intremap )
    return;

Which I think should be:

if ( !iommu_enable )
    return;

Sorry I didn't realize in that context. I think we need to decide
whether we want to fix the documentation to match the code, or whether
we should fix the code to match the documentation.

My preference would be for the latter, because I think the resulting
interface would be clearer. That will require introducing a new
dmaremap iommu suboption, but again I think this will result in a
better interface overall.

Thanks, Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.