[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] x86/kexec: Fix crash on transition to a 32bit kernel on AMD hardware


  • To: Ian Jackson <iwj@xxxxxxxxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Mon, 1 Nov 2021 17:32:52 +0000
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xkeh4Qdp+K8ptpykCeES9ZG4jDBim3zFPrAA50YSgAg=; b=Qq2sRO1XvoPiJ/CiC6C9MEYooLr1rykoJZMzoIn9k8hotZ/WVXohX1G+PfkdSTxXdirFSeS1JTdgo6c8ySWDhThlfkKo5//StDJFyP3HKwQEsH5jtA/w2URA3UuLmP48mOihIWIaVW9F9qREg94qiP2RoPXosXF9cPsQ99CfxV+wjTs12q7hDzQfheW/dpwsRD2GAokv8oz2aZGXv5yNpvWtgvNQppTPrwT/dtPbAeXf+HteIzjDzV8hAlJ9Jk3t+6EOPzdKcr6FtkYOztQVLUYQ2QF5FCNa3gnnleOHQnpxYFEqvy0/R3Fd73q8jOKsKE/4qh93UpTLW2fSROL4pw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=O0dMTHg/YV3GIDggUJTT43EVMizI6t7f8rexn0HyrL3LHJogh0gKxmT6HbKfFZ8jvZDy+WdF/JvUXPwLWFtZaHIcQ2ExvCzCU1W76uy5aoXZgYABOnym7QXxiiJ+e5FuP1E3Wn989F0gMbfbP4rgQZpP3f1TSJIAN4umZQoJufxUtvo+RMP4vlNiYJazOyPWHG3i/db32IJD3SNtlPQCMiJh/Ybh6ylSda9m1Y9UUEDsoge7w7qTTTBjVQVIqFnnDsZeJrVCMHcF/wGc5j7buBKkgT3CpZxrUFHUVexCvVjF6HxuXAeAZDW35owEULhjmHQglLOyOpK0wmUaQAbxIA==
  • Authentication-results: esa1.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
  • Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Jan Beulich <JBeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Delivery-date: Mon, 01 Nov 2021 17:33:26 +0000
  • Ironport-data: A9a23:D37Zja4UfBOpFzFORRtcjwxRtNzAchMFZxGqfqrLsTDasY5as4F+v mFLWDuAPP2NNGeneI8gPo+08hkDucfTzYdhSwBoqi00Hi5G8cbLO4+Ufxz6V8+wwmwvb67FA +E2MISowBUcFyeEzvuV3zyIQUBUjclkfJKlYAL/En03FVAMpBsJ00o5wrdg2tcw27BVPivW0 T/Mi5yHULOa82Yc3lI8s8pvfzs24ZweEBtB1rAPTagjUG32zhH5P7pGTU2FFFPqQ5E8IwKPb 72rIIdVXI/u10xF5tuNyt4Xe6CRK1LYFVDmZnF+A8BOjvXez8CbP2lS2Pc0MC9qZzu1c99Z1 flkrc2RcjUVIvectrwYS1p6AgByMvgTkFPHCSDXXc27ykTHdz3nwul0DVFwNoodkgp1KTgQr 7pCcmlLN03dwbLtqF64YrAEasALBc/nJo4A/FpnyinUF60OSpHfWaTao9Rf2V/cg+gTQqyGP pNGMlKDajzKaSwfI3gVVqtlt+mwolbxVj1KjEKs8P9fD2/7k1UqjemF3MDuUt2VR+1Fk0CAv GXE8m/lRBYAO7S32TeDt36hmOLLtSf6Q54JUq218OZwh1+ezXBVDwcZPXOZi/Skjk+1W/pEN lcZvCEpqMAPGFeDF4enGUfi+Tjd40BaC4E4//AGBB+l14b9+1e4PVo4UmQRRoQjrIwUVB0m2 Qrc9z/2PgBHvLqQQHOb076bqzKuJCQYRVM/iT84oRgtuIe6/txq5v7bZpM6SfPu0IWpcd3l6 2nS9HBWulkFsSIcO0xXF3jjiinkmJXGRxVdCu7/DjP8tVMRiGJIiuWVBbnnARRocd7xorqp5 iFsdy2iAAcmVsnlqcB1aL9RdIxFHt7cWNEmvXZhHoM66xOm8GO5cIZb7VlWfRkyb5lcJGKzM B6P6Gu9AaO/2lPwN8ebhKrqU6wXIVXIT4y5Bpg4kPIXOvCdizNrDAkxPBXNjggBYWAnkL0lO IfzTCpfJS1yNEiT9xLvH711+eZynkgWnDqPLbimn0XP+efPPxa9FOZaWGZim8hktctoVi2Oq I0BXyZLoj0CONDDjt7/qNVOcAtVcSBjbX00wuQOHtO+zsNdMDhJI9fawK87epwjmKJQl+zS+ Wq6VFMew1367UAr4y3QApy6QL+wD5t5s1whOikgYQSh13Q5ON7956YDbZonO7Ig8bU7n/JzS vAEfeSGA+hOFWubq2hMM8GlodwwbgmviCKPIzGhPGo1cal/SlGb4dTjZAbuqnUDV3Llqcskr rS8/QrHWp5fFR96BcPbZav3nVO8tHQQgsxoWE7MLoUBcUng6tEyeSfwkuU2M4cHLhCanmmW0 AOfABE5o+jRotBqrImV1P7c94rwSrlwBEtXGWXf/I2aDyiC8zrx25JEXcaJYSvZCDH+9pK9a LgH1Pr7KvAGwgpH6tIuD7ZxwKsizNLzvLsGnB98FXDGYln3WLNtJn6KgZtGuqFXn+ILvAK3X gSE+8VAOKXPM8TgSQZDKA0gZ+WF9PcVhjiNsqhlfBSkvHd6rOidTEFfHxiQkygMfrJ6PbQsz folpMNLuRe0jQAnM4regy1Zn4hWwqfsj0nzWkkmPbLW
  • Ironport-hdrordr: A9a23:ksqn5ar/QPhs9RIwixcZl7kaV5u7L9V00zEX/kB9WHVpm5Oj+P xGzc526farslsssREb+OxpOMG7MBfhHO1OkPYs1NCZLXXbUQqTXfxfBO7ZrQEIdBeOjtK1uZ 0QFZSWTeeAd2SS7vyKkDVQcexQueVvmZrA7Yy1rwYPPHJXguNbnmBE426gYzxLrWJ9dPgE/f Snl696TnabCA8qhpPRPAh6YwGPnayHqLvWJTo9QzI34giHij2lrJb8Dhijxx8bFxdC260r/2 TpmxHwovzLiYD19jbsk0voq7hGktrozdVOQOSKl8guMz3pziKlfp5oVbGutC085Muv9FEput /RpApIBbU+11rhOkWO5Tf90Qjp1zgjr1fk1F+jmHPm5ff0QTorYvAxzb5xQ1/80Q4Nrdt82K VE0yayrJxMFy7Nmyz7+pzhSwxqvlDcmwtjrccjy1hkFacOYr5YqoISuGlPFo0bIS784Ic7VM FzEcDn4upMe1/yVQGZgoBW+q3vYp0PJGbCfqBb0fbllwS+3UoJgXfw/fZv3Uvpr/kGOt55D+ etCNUgqFgBdL5RUUtHPpZ1fSKAMB26ffv9ChPhHb3ZLtByB5vske+93Fxn3pDhRHQ3pKFC76 gpFmko7FIPRw==
  • Ironport-sdr: p7lf8pNpUMIq2K4s8hOjgEPUabWH55HxxDzKp+q3MX8id4GGmOciEbpOyOOuIbK/ZTid5lthqZ dmD95R35LATI6yze8Vcu1z2so8ILiUd+n5szFLAtb+XKvWN6SktyVxrjJiP8l+BlX3iPrHnGE6 RbLOXxfipzm1rtuk8iy1tIHJ75eIK7bgtAgtHYkyKu3SHUki6Y2hjBtYh1WSAlSKhTAsT9Ttbo 378CXRJpnsk4Oq9rDbog9FMgbKWljI8QLECTwTMGH4fvj1lBYXAtNt/82YzCbSehc0xglahi3y 1xfLbUu2SRb6JruATy0fTGwt
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 01/11/2021 12:13, Ian Jackson wrote:
> Andrew Cooper writes ("Re: [PATCH] x86/kexec: Fix crash on transition to a 
> 32bit kernel on AMD hardware"):
>> This path is only taken for a 32bit crash kernel.  It is not taken for
>> 64bit crash kernels, or they wouldn't work on AMD either, and this is
>> something we test routinely in XenServer.
>>
>> The worst that can happen is that I've messed the lretq pattern up, and
>> broken transition to all 32bit crash kernels, irrespective of hardware
>> vendor.
>>
>> It will either function correctly, or explode.  If it is broken, it
>> won't be subtle, or dependent on the phase of the moon/etc.
> Thanks for this confirmation.
>
> Release-Acked-by: Ian Jackson <iwj@xxxxxxxxxxxxxx>

Thanks.

Unfortunately, I've made a blunder here.  The code as implemented is
broken on Intel, and works on AMD.  (I.e. I need to swap Intel and AMD
in the commit message).  Have done locally, but won't repost just for that.

~Andrew



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.