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Re: [PATCH v3 12/17] xen/arm: Add support for Xilinx ZynqMP PCI host controller


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Rahul Singh <Rahul.Singh@xxxxxxx>
  • Date: Thu, 30 Sep 2021 10:42:41 +0000
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  • Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Andre Przywara <Andre.Przywara@xxxxxxx>, Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>, Julien Grall <julien@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Thu, 30 Sep 2021 10:43:02 +0000
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  • Thread-topic: [PATCH v3 12/17] xen/arm: Add support for Xilinx ZynqMP PCI host controller

Hi Jan

> On 30 Sep 2021, at 8:48 am, Jan Beulich <jbeulich@xxxxxxxx> wrote:
> 
> On 29.09.2021 18:41, Stefano Stabellini wrote:
>> On Tue, 28 Sep 2021, Rahul Singh wrote:
>>> --- /dev/null
>>> +++ b/xen/arch/arm/pci/pci-host-zynqmp.c
>>> @@ -0,0 +1,63 @@
>>> +/*
>>> + * Based on Linux drivers/pci/controller/pci-host-common.c
>>> + * Based on Linux drivers/pci/controller/pci-host-generic.c
>>> + * Based on xen/arch/arm/pci/pci-host-generic.c
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
>>> + */
>>> +
>>> +#include <asm/device.h>
>>> +#include <xen/pci.h>
>>> +#include <asm/pci.h>
>>> +
>>> +static int nwl_cfg_reg_index(struct dt_device_node *np)
>>> +{
>>> +    return dt_property_match_string(np, "reg-names", "cfg");
>>> +}
>> 
>> Can this be __init?
>> 
>> 
>>> +/* ECAM ops */
>>> +const struct pci_ecam_ops nwl_pcie_ops = {
>>> +    .bus_shift  = 20,
>>> +    .cfg_reg_index = nwl_cfg_reg_index,
>>> +    .pci_ops    = {
>>> +        .map_bus                = pci_ecam_map_bus,
>>> +        .read                   = pci_generic_config_read,
>>> +        .write                  = pci_generic_config_write,
>>> +    }
>>> +};
>>> +
>>> +static const struct dt_device_match nwl_pcie_dt_match[] = {
>> 
>> This should probably be __initconst
> 
> __initconstrel again as it seems.

Ack. I will use __initconstrel in next version.

Regards,
Rahul
> 
> Jan
> 




 


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