[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v1 05/14] xen/arm: PCI host bridge discovery within XEN on ARM


  • To: Rahul Singh <rahul.singh@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@xxxxxxxx>
  • Date: Mon, 13 Sep 2021 14:52:18 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=0ldnG/GMbT4VccrgdRTQVXDGlqcsYzq98mP0a7Rai3I=; b=EMUAk3SHkmAa1gTVnFHvR5VNxFEE+nQTzXwAnNRQ3bEF9ndOXrM52kdAw8WpeWonMrisk2xQhT2QmDw4m+PqOTRFSFrdjR7YP1PGMZEagWrWYstarZueAjw9QW/+DmFEKpLuK5Lle7xbh0M7VxlfwbG8Uu6FbNUtadPu+PsdayQuB0Xq+b1TEwXE1o5MFULILJWC00w9SLgMTDfwqQBMel1rabqCMzTJuewc2RWbCW0f+V08+8NK43Tr5xDXNf+v+4fIiv2+FXGAPlH0KM8nQ6n0vqyO7QmFXO4iCfzpY2zUDx2trN1J7H3Fc2S15RKGJgabEWYI+PpqIkN8iN28mg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ky9tQ3KiIZgtYcW4j0kyLF/cXcrsKAuV0Hc7M0COPMaN1aUo/pBiZtx9u9V207WQzUtYhcGTtDo+KTYtUp9d3cTLtyCtOO9Cs4DvZDaP6HVK3N0gBMaocClBv1o+n9JkomGV4RrpY8cazjw7xgVgdXhh2MGRM1jfHcsZXiwzFofDIMKP/6VR1kZMJ09AV6GI0TmqXcuUsznd5cHV83XMKVn5GJ274EuqnU3/X0Nn+vkw9VAw4D39Pe60y37wc8/TovKZ7c3B2r8NF2npF6UfKJA6LYCzDba2OQaO3zAs/zPj6EQhk9RqdVoGATyQ3/yGTHRfB/VOMuK/brSV2kyiDw==
  • Authentication-results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=epam.com;
  • Cc: Bertrand Marquis <bertrand.marquis@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Mon, 13 Sep 2021 14:52:30 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHXqK7zTKPAnBLuBkixTqpTrxO8Dg==
  • Thread-topic: [PATCH v1 05/14] xen/arm: PCI host bridge discovery within XEN on ARM

Hi, Rahul!

On 19.08.21 15:02, Rahul Singh wrote:
> XEN during boot will read the PCI device tree node “reg” property
> and will map the PCI config space to the XEN memory.
[snip]
> +static struct pci_config_window *gen_pci_init(struct dt_device_node *dev,
> +                                              int ecam_reg_idx)
> +{
> +    int err;
> +    struct pci_config_window *cfg;
> +    paddr_t addr, size;
> +
> +    cfg = xzalloc(struct pci_config_window);
> +    if ( !cfg )
> +        return NULL;
> +
> +    err = dt_pci_parse_bus_range(dev, cfg);
> +    if ( !err ) {
> +        cfg->busn_start = 0;
> +        cfg->busn_end = 0xff;
> +        printk(XENLOG_ERR "%s:No bus range found for pci controller\n",
> +               dt_node_full_name(dev));
> +    } else {
> +        if ( cfg->busn_end > cfg->busn_start + 0xff )
> +            cfg->busn_end = cfg->busn_start + 0xff;
> +    }
> +
> +    /* Parse our PCI ecam register address*/
> +    err = dt_device_get_address(dev, ecam_reg_idx, &addr, &size);

I am a bit worried here that we don't get the reg index from the device tree,

but for generic ECAM we use reg[0] and for Xilinx we use reg[2].

For example, for Xilinx we have

reg = <0x00 0xfd0e0000 0x00 0x1000 0x00 0xfd480000 0x00 0x1000 0x80 0x00 0x00 
0x1000000>;
reg-names = "breg\0pcireg\0cfg";

so, we can parse the reg-names and understand that the configuration space is 
the last in the reg property.

The same I think can be done for other device trees probably.

Rahul, do you know if reg-names "cfg" is vendor specific of used widely?

Thank you,

Oleksandr

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.