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Re: [PATCH] x86/cpuid: Advertise no-lmsle unilaterally to hvm guests


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Mon, 12 Apr 2021 12:39:24 +0100
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  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
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  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 12/04/2021 11:48, Jan Beulich wrote:
> On 12.04.2021 12:22, Andrew Cooper wrote:
>> --- a/xen/arch/x86/cpuid.c
>> +++ b/xen/arch/x86/cpuid.c
>> @@ -456,6 +456,12 @@ static void __init calculate_hvm_max_policy(void)
>>      __set_bit(X86_FEATURE_X2APIC, hvm_featureset);
>>  
>>      /*
>> +     * We don't support EFER.LMSLE at all.  AMD has dropped the feature from
>> +     * hardware and allocated a CPUID bit to indicate its absence.
>> +     */
>> +    __set_bit(X86_FEATURE_NO_LMSLE, hvm_featureset);
> Why only for HVM?

That was discussed.

> And shouldn't the LM: entry in the dependencies
> table be adjusted such that !LM implies this bit clear?

Probably.

~Andrew




 


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