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[PATCH 1/6] Intel Processor Trace Support: Add CHANGELOG.md and SUPPORT.md entries


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: George Dunlap <george.dunlap@xxxxxxxxxx>
  • Date: Wed, 24 Mar 2021 16:44:02 +0000
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  • Cc: George Dunlap <george.dunlap@xxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Ian Jackson <ian.jackson@xxxxxxxxxx>, "Tamas K Lengyel" <tamas.lengyel@xxxxxxxxxxxx>
  • Delivery-date: Wed, 24 Mar 2021 16:44:34 +0000
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Signed-off-by: George Dunlap <george.dunlap@xxxxxxxxxx>
---
CC: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CC: Ian Jackson <ian.jackson@xxxxxxxxxx>
CC: Tamas K Lengyel <tamas.lengyel@xxxxxxxxxxxx>
---
 CHANGELOG.md | 1 +
 SUPPORT.md   | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index c407f6bb2f..7f03e85bd7 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -10,6 +10,7 @@ The format is based on [Keep a 
Changelog](https://keepachangelog.com/en/1.0.0/)
  - ARM IOREQ servers (device emulation etc.) (Tech Preview)
  - Renesas IPMMU-VMSA (Supported, not security supported; was Tech Preview)
  - ARM SMMUv3 (Tech Preview)
+ - Intel Processor Trace support (Tech Preview)
 
 ## Removed / support downgraded
 
diff --git a/SUPPORT.md b/SUPPORT.md
index a1efd8fcfd..966ddf89c8 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -247,6 +247,13 @@ Export hypervisor coverage data suitable for analysis by 
gcov or lcov.
 
     Status: Supported, Not security supported
 
+### Processor trace support
+
+Support for using Intel Processor Trace technology to trace guests
+from dom0.
+
+    Status: Tech Preview
+
 ## Memory Management
 
 ### Dynamic memory control
-- 
2.30.2




 


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