[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [PATCH] xen/arm: Add Cortex-A73 erratum 858921 workaround


  • To: Stefano Stabellini <sstabellini@xxxxxxxxxx>
  • From: Wei Chen <Wei.Chen@xxxxxxx>
  • Date: Thu, 26 Nov 2020 02:07:02 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WPAbLGBAZE5fuf6VcfGW9nHH568YYdBtCzwh5B6dB9I=; b=XpOyIiCy2zkLlMu1cGFAddFyaMXOG0QCTJbnjilrpa9M3u60VtWPn7eYac1Ixk7laQ/WThlm0de/oeDTTnCcaScG5ptCjmoUg59UB4AbCO5pLdqyM4t7hz7NRIFFe4Ol3+6NB7jFkzzjvsZ067UkAkw02zkPKNfd5GJw2YWLs4DeIXtRabkSjvuYbDEt68ajFFvVhYgBiZHqmUf6nxamQn9dhqzoJQm03ROLhPfS4zS8nLYrrs2rzNj7ee+Ch0G9aKcpMobOsi9DjD4IuQ6lfpwjWPiNTkLG7gv1dY9t+TCMEHWXdxay0syZT24dUXJTV6snCQjwbxaQ6QLwfOZSgw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kfmj6rsgKSi3nnF8cr2DLVM2fxMk9RO3qgf54poVioCelxpDBfC+u5bRYrH4J241jRlUFH5V2BXADToUD0cpJOtD57KHyeWqIWXPZLLemQoAAXbq89vumiHoZoLMK/I8mi1YnlZH5aOuCtQJ6kk8/awMdVU4of1WcZ4vYtM+gQ/5yDRItFrX8PEgwAksQbLhRaE3UquGGuxMjw0BTgW2oxcBEN4DoSyqCiIybEWNg+nrFpVhGlqQeoSkmqpz73tWsAZUxTYDLErmLABAXGuar3UzhfWCeN3idgM7hHan4Otp+355mnmbCO28IM0wKCJKC11eAGaGsTiMZkmTY2gLBw==
  • Authentication-results-original: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=arm.com;
  • Cc: Julien Grall <julien@xxxxxxx>, Penny Zheng <Penny.Zheng@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andre Przywara <Andre.Przywara@xxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Kaly Xin <Kaly.Xin@xxxxxxx>, nd <nd@xxxxxxx>
  • Delivery-date: Thu, 26 Nov 2020 02:07:36 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Nodisclaimer: true
  • Original-authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=arm.com;
  • Thread-index: AQHWtnF2jWNIb4RgFU+PRE0mwpdPDam/tA6AgAW2ODCAFDcMgIAAINyA
  • Thread-topic: [PATCH] xen/arm: Add Cortex-A73 erratum 858921 workaround

Hi Stefano,

> -----Original Message-----
> From: Stefano Stabellini <sstabellini@xxxxxxxxxx>
> Sent: 2020年11月26日 8:00
> To: Wei Chen <Wei.Chen@xxxxxxx>
> Cc: Julien Grall <julien@xxxxxxx>; Penny Zheng <Penny.Zheng@xxxxxxx>; xen-
> devel@xxxxxxxxxxxxxxxxxxxx; sstabellini@xxxxxxxxxx; Andre Przywara
> <Andre.Przywara@xxxxxxx>; Bertrand Marquis <Bertrand.Marquis@xxxxxxx>;
> Kaly Xin <Kaly.Xin@xxxxxxx>; nd <nd@xxxxxxx>
> Subject: RE: [PATCH] xen/arm: Add Cortex-A73 erratum 858921 workaround
> 
> Resuming this old thread.
> 
> On Fri, 13 Nov 2020, Wei Chen wrote:
> > > Hi,
> > >
> > > On 09/11/2020 08:21, Penny Zheng wrote:
> > > > CNTVCT_EL0 or CNTPCT_EL0 counter read in Cortex-A73 (all versions)
> > > > might return a wrong value when the counter crosses a 32bit boundary.
> > > >
> > > > Until now, there is no case for Xen itself to access CNTVCT_EL0,
> > > > and it also should be the Guest OS's responsibility to deal with
> > > > this part.
> > > >
> > > > But for CNTPCT, there exists several cases in Xen involving reading
> > > > CNTPCT, so a possible workaround is that performing the read twice,
> > > > and to return one or the other depending on whether a transition has
> > > > taken place.
> > > >
> > > > Signed-off-by: Penny Zheng <penny.zheng@xxxxxxx>
> > >
> > > Acked-by: Julien Grall <jgrall@xxxxxxxxxx>
> > >
> > > On a related topic, do we need a fix similar to Linux commit
> > > 75a19a0202db "arm64: arch_timer: Ensure counter register reads occur
> > > with seqlock held"?
> > >
> >
> > I take a look at this Linux commit, it seems to prevent the seq-lock to be
> > speculated.  Using an enforce ordering instead of ISB after the read counter
> > operation seems to be for performance reasons.
> >
> > I have found that you had placed an ISB before read counter in get_cycles
> > to prevent counter value to be speculated. But you haven't placed the second
> > ISB after reading. Is it because we haven't used the get_cycles in seq lock
> > critical context (Maybe I didn't find the right place)? So should we need 
> > to fix it
> > now, or you prefer to fix it now for future usage?
> 
> Looking at the call sites, it doesn't look like we need any ISB after
> get_cycles as it is not used in any critical context. There is also a
> data dependency with the value returned by it.
> 
> So I am thinking we don't need any fix. At most we need an in-code comment?

I agree with you to add an in-code comment. It will remind us in future when we
use the get_cycles in critical context. Adding it now will probably only lead to
meaningless performance degradation. Because Xen may never use it in a similar
scenario.

BTW: 
Can we send a patch that just contains a pure comment : )

Regards,
Wei Chen

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.