[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 5/7] x86: guard against straight-line speculation past RET
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Tue, 10 Nov 2020 10:31:42 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CY6pf+Of+ze4JW9l14slxpn+ssZAYMU0Um5kRS/63n4=; b=ofX6xA/gznKZsZo0am89Je6RDV1VUE2UvPGLf3tkX+TsOaZw46ijS5c3MhIsFI4LH1OnwAxgzdgKjGJ/22wtEL6CsOryXb9gzX2Ha/3Jc+ceIu1VvAIkUHFawSV/KddE8oQw/HohWXzvHLJGZl1cnYgU2jWe2Hb4UO3dTaf99GyzOHrm+sGy1F/p+XYNxAxl0Pg6BFfuHPO2pdpiWEQTRCiwoBf1GN3XqcWibUGPSJHxopn5Uxr61I3SZ6HtrTGbnDtvFMDQ42ey8rKHcS1mV8ccR9oA0vGymQ+RXsyhqSmXpFJfHc3P2M05eHUYb0I6rR8zUVFU2yUCluS5/kP//Q==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=N0QdhoLJvdk+wrxWHoyWoNMEXn3MrKWWzwTVkCXtEjqE3pV0SFifYAcLVgc4CPt8qetmm/vgJtNBB1qdlLjOjip/nxNIgJt6toR2GzDfISsvkfwbtWKitUCSg+xAAmXT+XQt8OIpSlD60/mdN224cMKxlviFYaRijadSTDQ6LrB5C3FSOOxxa42c9TFvU1uBJ4Vco5e8hujq9jHEGzxxv0zrjt3nz+ilZU4Hvu8LC+Ot4u8LNyKMJMrt2tgbhhzocrSDFyXCZ505tmZ1bAZ3Fghzyu+QoeQFakjSaj4MwOE86oLpYWWUYNSEF2uKhxFk44t6L1az4xtk1xwzv61SZw==
- Authentication-results: esa6.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, "Andrew Cooper" <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Tue, 10 Nov 2020 09:32:05 +0000
- Ironport-sdr: b4Oc9sYOlA7OPfP5KugD1DplPah5xUojux4VVDKaZ0ZjAH/H2P+a1OnXpOIAmMxuC9/9oxdxnD ZbcXrk1XmNjQj9lcgIA/H1UfrUzGE9g58jWoLJ235SKI/3OYPmKXCg9lHyLho5AVSfk8HM8N/S bkmbsbLSwXUeAloxWrS16nM0TejFb1jgPF10P505Fh8GziT/kiaF/1R4yLK6qm5mk80mV07j0y Aod0ora0yaVIm1+hGoWONTarc0fLBoA+kzu3R3Cw60ztR1Gfnm4v1qSCR85nnNU4Cnx/SuGu4O cjc=
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Fri, Oct 23, 2020 at 10:38:04AM +0200, Jan Beulich wrote:
> Under certain conditions CPUs can speculate into the instruction stream
> past a RET instruction. Guard against this just like 3b7dab93f240
> ("x86/spec-ctrl: Protect against CALL/JMP straight-line speculation")
> did - by inserting an "INT $3" insn. It's merely the mechanics of how to
> achieve this that differ: A set of macros gets introduced to post-
> process RET insns issued by the compiler (or living in assembly files).
>
> Unfortunately for clang this requires further features their built-in
> assembler doesn't support: We need to be able to override insn mnemonics
> produced by the compiler (which may be impossible, if internally
> assembly mnemonics never get generated), and we want to use \(text)
> escaping / quoting in the auxiliary macro.
Could this have an option to enable/disable at build time?
FreeBSD will drop GNU as quite soon from base, and albeit it can be
installed as a package I would like to be able to build Xen using a
toolchain based on LLVM exclusively.
Thanks, Roger.
|