Re: [PATCH] x86/svm: ignore accesses to EX_CFG

[Jan Beulich <jbeulich@xxxxxxxx>]

On 16.09.2020 12:54, Roger Pau Monne wrote:
> Windows 10 will try to unconditionally read EX_CFG on AMD hadrware,
> and injecting a #GP fault will result in a panic:
> 
> svm.c:1964:d5v0 RDMSR 0xc001102c unimplemented
> d5v0 VIRIDIAN CRASH: 7e ffffffffc0000096 fffff8054cbe5ffe fffffa0837a066e8 
> fffffa0837a05f30
> 
> Return 0 when trying to read the MSR and drop writes.

So I've gone through a bunch of BKDGs and PPRs, without finding
this MSR mentioned in any of them. Could you point out on which
model(s) it actually exists? You must have found it somewhere,
or else you wouldn't know a name for it...

> @@ -2108,6 +2109,7 @@ static int svm_msr_write_intercept(unsigned int msr, 
> uint64_t msr_content)
>      case MSR_K8_TOP_MEM2:
>      case MSR_K8_SYSCFG:
>      case MSR_K8_VM_CR:
> +    case MSR_AMD64_EX_CFG:
>          /* ignore write. handle all bits as read-only. */
>          break;

Is this necessary, rather than having writes fault?

> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -330,6 +330,7 @@
>  #define MSR_AMD64_DC_CFG             0xc0011022
>  #define MSR_AMD64_DE_CFG             0xc0011029
>  #define AMD64_DE_CFG_LFENCE_SERIALISE        (_AC(1, ULL) << 1)
> +#define MSR_AMD64_EX_CFG                0xc001102c

Indentation here wants to match the siblings, i.e. use hard tabs
(for now). Easily addressed while committing, of course.

Jan