Re: [PATCH v3 1/8] x86/vmx: handle writes to MISC_ENABLE MSR

[Jan Beulich <jbeulich@xxxxxxxx>]

On 07.09.2020 05:25, Tian, Kevin wrote:
>> From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
>> Sent: Tuesday, September 1, 2020 6:55 PM
>>
>> Such handling consist in checking that no bits have been changed from
>> the read value, if that's the case silently drop the write, otherwise
>> inject a fault.
>>
>> At least Windows guests will expect to write to the MISC_ENABLE MSR
>> with the same value that's been read from it.
> 
> for better readability could you also add this line to the code comment
> below?
> 
> with that:
> 
>       Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

I'll fold this in while committing.

Jan