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Re: [PATCH for-4.14 v3] x86/tlb: fix assisted flush usage



Hi Roger,

Sorry I didn't manage to answer to your question before you sent v3.

On 25/06/2020 12:30, Roger Pau Monne wrote:
diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h
index ab1aae5c90..7ae0543885 100644
--- a/xen/include/asm-arm/flushtlb.h
+++ b/xen/include/asm-arm/flushtlb.h
@@ -27,6 +27,7 @@ static inline void page_set_tlbflush_timestamp(struct 
page_info *page)
/* Flush specified CPUs' TLBs */
  void flush_tlb_mask(const cpumask_t *mask);
+#define flush_tlb_mask_sync flush_tlb_mask

Dropping the parameter 'sync' from filtered_flush_tlb_mask() is a nice improvement, but it unfortunately doesn't fully address my concern.

After this patch there is exactly one use of flush_tlb_mask() in common code (see grant_table.c). But without looking at the x86 code, it is not clear why this requires a different flush compare to the two other sites.

IOW, if I want to modify the common code in the future, how do I know which flush to call?

Cheers,

--
Julien Grall



 


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