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Re: [PATCH v4] x86/idle: prevent entering C6 with in service interrupts on Intel

  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Fri, 22 May 2020 15:54:29 +0200
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  • Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx, Wei Liu <wl@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Delivery-date: Fri, 22 May 2020 13:55:02 +0000
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On Fri, May 22, 2020 at 03:42:10PM +0200, Jan Beulich wrote:
> On 21.05.2020 11:22, Roger Pau Monne wrote:
> > Apply a workaround for Intel errata BDX99, CLX30, SKX100, CFW125,
> > BDF104, BDH85, BDM135, KWB131: "A Pending Fixed Interrupt May Be
> > Dispatched Before an Interrupt of The Same Priority Completes".
> While the change looks good to me as far as Broadwell goes, I
> think it was before this posting that Andrew also pointed at
> a specific Haswell erratum instance, still on the v3 thread.
> Am I to imply a v5 will follow adding affected Haswell models
> to the table?

Those refer to a different errata, see:


So we believe this also affects Haswell, but the errata is not published
for those CPUs (yet at least). If/when it's published I'm happy to add
it, in the meantime I think we should go with what has been published
by Intel.




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