[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH] VT-x: extend LBR Broadwell errata coverage
For lbr_tsx_fixup_check() simply name a few more specific errata numbers. For bdf93_fixup_check(), however, more models are affected. Oddly enough despite being the same model and stepping, the erratum is listed for Xeon E3 but not its Core counterpart. With this it's of course also uncertain whether the absence of the erratum for Xeon D is actually meaningful. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2870,8 +2870,10 @@ static void __init lbr_tsx_fixup_check(v case 0x45: /* HSM182 - 4th gen Core */ case 0x46: /* HSM182, HSD172 - 4th gen Core (GT3) */ case 0x3d: /* BDM127 - 5th gen Core */ - case 0x47: /* BDD117 - 5th gen Core (GT3) */ - case 0x4f: /* BDF85 - Xeon E5-2600 v4 */ + case 0x47: /* BDD117 - 5th gen Core (GT3) + BDW117 - Xeon E3-1200 v4 */ + case 0x4f: /* BDF85 - Xeon E5-2600 v4 + BDX88 - Xeon E7-x800 v4 */ case 0x56: /* BDE105 - Xeon D-1500 */ break; default: @@ -2895,15 +2897,26 @@ static void __init lbr_tsx_fixup_check(v static void __init bdf93_fixup_check(void) { /* - * Broadwell erratum BDF93: + * Broadwell erratum BDF93 et al: * * Reads from MSR_LER_TO_LIP (MSR 1DEH) may return values for bits[63:61] * that are not equal to bit[47]. Attempting to context switch this value * may cause a #GP. Software should sign extend the MSR. */ - if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x4f ) + if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || + boot_cpu_data.x86 != 6 ) + return; + + switch ( boot_cpu_data.x86_model ) + { + case 0x3d: /* BDM131 - 5th gen Core */ + case 0x47: /* BDD??? - 5th gen Core (H-Processor line) + BDW120 - Xeon E3-1200 v4 */ + case 0x4f: /* BDF93 - Xeon E5-2600 v4 + BDX93 - Xeon E7-x800 v4 */ bdf93_fixup_needed = true; + break; + } } static int is_last_branch_msr(u32 ecx)
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