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Re: [PATCH] x86/ucode/intel: Writeback and invalidate caches before updating microcode

On 04.05.2020 14:47, Andrew Cooper wrote:
> From: Ashok Raj <ashok.raj@xxxxxxxxx>
> Updating microcode is less error prone when caches have been flushed and
> depending on what exactly the microcode is updating. For example, some of the
> issues around certain Broadwell parts can be addressed by doing a full cache
> flush.
> Signed-off-by: Ashok Raj <ashok.raj@xxxxxxxxx>
> Signed-off-by: Borislav Petkov <bp@xxxxxxx>
> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> [Linux commit 91df9fdf51492aec9fed6b4cbd33160886740f47, ported to Xen]
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Acked-by: Jan Beulich <jbeulich@xxxxxxxx>



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