Re: [Xen-devel] [PATCH] x86/vPMU: don't blindly assume IA32_PERF_CAPABILITIES MSR exists

[Roger Pau Monné <roger.pau@xxxxxxxxxx>]

On Wed, Feb 26, 2020 at 10:19:19AM +0100, Jan Beulich wrote:
> Just like VMX'es lbr_tsx_fixup_check() the respective CPUID bit should
> be consulted first.
> 
> Reported-by: Farrah Chen <farrah.chen@xxxxxxxxx>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> --- a/xen/arch/x86/cpu/vpmu_intel.c
> +++ b/xen/arch/x86/cpu/vpmu_intel.c
> @@ -900,7 +900,6 @@ int vmx_vpmu_initialise(struct vcpu *v)
>  
>  int __init core2_vpmu_init(void)
>  {
> -    u64 caps;
>      unsigned int version = 0;
>      unsigned int i;
>  
> @@ -932,8 +931,14 @@ int __init core2_vpmu_init(void)
>  
>      arch_pmc_cnt = core2_get_arch_pmc_count();
>      fixed_pmc_cnt = core2_get_fixed_pmc_count();
> -    rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps);
> -    full_width_write = (caps >> 13) & 1;
> +
> +    if ( cpu_has_pdcm )
> +    {
> +        uint64_t caps;
> +
> +        rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps);
> +        full_width_write = (caps >> 13) & 1;

Will PMU work without PDCM?

I've been grepping the Intel SDMs, but the only mention is that PDCM
signal the availability of MSR_IA32_PERF_CAPABILITIES.

Thanks, Roger.

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