[Xen-devel] [PATCH] Avoid cpu_physical_memory_rw() with a constant is_write argument

[Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>]

This commit was produced with the included Coccinelle script
scripts/coccinelle/as-rw-const.patch.

Inspired-by: Peter Maydell <peter.maydell@xxxxxxxxxx>
Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
---
Based-on: <20200218112457.22712-1-peter.maydell@xxxxxxxxxx>

Maybe can be squashed in Peter's patch?

Cocci script can be written as:

    @@
    expression E1, E2, E3, E4, E5;
    symbol true, false;
    @@
    (
    - address_space_rw(E1, E2, E3, E4, E5, false)
    + address_space_read(E1, E2, E3, E4, E5)
    |
    - address_space_rw(E1, E2, E3, E4, E5, 0)
    + address_space_read(E1, E2, E3, E4, E5)
    |
    - address_space_rw(E1, E2, E3, E4, E5, true)
    + address_space_write(E1, E2, E3, E4, E5)
    |
    - address_space_rw(E1, E2, E3, E4, E5, 1)
    + address_space_write(E1, E2, E3, E4, E5)
    )

    @@
    expression E1, E2, E3;
    @@
    (
    - cpu_physical_memory_rw(E1, E2, E3, false)
    + cpu_physical_memory_read(E1, E2, E3)
    |
    - cpu_physical_memory_rw(E1, E2, E3, 0)
    + cpu_physical_memory_read(E1, E2, E3)
    |
    - cpu_physical_memory_rw(E1, E2, E3, true)
    + cpu_physical_memory_write(E1, E2, E3)
    |
    - cpu_physical_memory_rw(E1, E2, E3, 1)
    + cpu_physical_memory_write(E1, E2, E3)
    )
---
 hw/xen/xen_pt_graphics.c             |  2 +-
 target/i386/hax-all.c                |  4 ++--
 scripts/coccinelle/as_rw_const.cocci | 20 +++++++++++++++++++-
 3 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
index b69732729b..a3bc7e3921 100644
--- a/hw/xen/xen_pt_graphics.c
+++ b/hw/xen/xen_pt_graphics.c
@@ -222,7 +222,7 @@ void xen_pt_setup_vga(XenPCIPassthroughState *s, 
XenHostPCIDevice *dev,
     }
 
     /* Currently we fixed this address as a primary for legacy BIOS. */
-    cpu_physical_memory_rw(0xc0000, bios, bios_size, 1);
+    cpu_physical_memory_write(0xc0000, bios, bios_size);
 }
 
 uint32_t igd_read_opregion(XenPCIPassthroughState *s)
diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c
index a8b6e5aeb8..f5971ccc74 100644
--- a/target/i386/hax-all.c
+++ b/target/i386/hax-all.c
@@ -376,8 +376,8 @@ static int hax_handle_fastmmio(CPUArchState *env, struct 
hax_fastmmio *hft)
          *  hft->direction == 2: gpa ==> gpa2
          */
         uint64_t value;
-        cpu_physical_memory_rw(hft->gpa, (uint8_t *) &value, hft->size, 0);
-        cpu_physical_memory_rw(hft->gpa2, (uint8_t *) &value, hft->size, 1);
+        cpu_physical_memory_read(hft->gpa, (uint8_t *)&value, hft->size);
+        cpu_physical_memory_write(hft->gpa2, (uint8_t *)&value, hft->size);
     }
 
     return 0;
diff --git a/scripts/coccinelle/as_rw_const.cocci 
b/scripts/coccinelle/as_rw_const.cocci
index 30da707701..c9a39f1abe 100644
--- a/scripts/coccinelle/as_rw_const.cocci
+++ b/scripts/coccinelle/as_rw_const.cocci
@@ -1,6 +1,6 @@
 // Avoid uses of address_space_rw() with a constant is_write argument.
 // Usage:
-//  spatch --sp-file as-rw-const.spatch --dir . --in-place
+//  spatch --sp-file scripts/coccinelle/as_rw_const.cocci --dir . --in-place
 
 @@
 expression E1, E2, E3, E4, E5;
@@ -28,3 +28,21 @@ expression E1, E2, E3, E4, E5;
 
 - address_space_rw(E1, E2, E3, E4, E5, 1)
 + address_space_write(E1, E2, E3, E4, E5)
+
+// Avoid uses of cpu_physical_memory_rw() with a constant is_write argument.
+@@
+expression E1, E2, E3;
+@@
+(
+- cpu_physical_memory_rw(E1, E2, E3, false)
++ cpu_physical_memory_read(E1, E2, E3)
+|
+- cpu_physical_memory_rw(E1, E2, E3, 0)
++ cpu_physical_memory_read(E1, E2, E3)
+|
+- cpu_physical_memory_rw(E1, E2, E3, true)
++ cpu_physical_memory_write(E1, E2, E3)
+|
+- cpu_physical_memory_rw(E1, E2, E3, 1)
++ cpu_physical_memory_write(E1, E2, E3)
+)
-- 
2.21.1


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