Re: [Xen-devel] [PATCH v3 3/3] x86/hyperv: L0 assisted TLB flush

[Wei Liu <wl@xxxxxxx>]

On Tue, Feb 18, 2020 at 10:40:29AM +0000, Wei Liu wrote:
> > 
> > > +    uint64_t ret;
> > > +
> > > +    if ( !flush || cpumask_empty(mask) )
> > > +    {
> > > +        ASSERT_UNREACHABLE();
> > > +        return -EINVAL;
> > > +    }
> > > +
> > > +    local_irq_save(irq_flags);
> > 
> > I think you disable interrupts in order to prevent re-entering this
> > function, and hence avoid an interrupt from triggering in the middle
> > and also attempting to do a TLB flush using the same per-CPU input
> > page.
> > 
> > As pointed out to me by Jan, we can also get #MC and #NMI which will
> > still happen despite interrupts being disabled, and hence you might
> > want to assert that you are not in #MC or #NMI context before
> > accessing the per-CPU hv_input_page (or else just return an error
> > and avoid using the assisted flush). I have a patch that will
> > hopefully be able to signal when in #MC or #NMI context.
> > 
> 
> This function should return an error in that case. It is better to fall
> back to native path than crashing.
> 

I briefly read through the other thread about what is allowed in #NMI or
#MC context. The discussion centred around if some operation should be
allowed to happen in those contexts in the first place.

For now I will just add a comment in the Hyper-V code. Once that
discussion is resolved, Hyper-V code can follow suite where applicable.

Wei.

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