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Re: [Xen-devel] [PATCH 3/4] AMD/IOMMU: Treat guest head/tail pointers as byte offsets

On 03.02.2020 15:43, Andrew Cooper wrote:
> The MMIO registers as already byte offsets.  By masking out the reserved bits
> suitably in guest_iommu_mmio_write64(), we can use the values directly,
> instead of masking/shifting on every use.

I guess it's unclear whether such masking matches real hardware
behavior, but it's certainly within spec with all other bits
there reserved.

> Store the buffer size, rather than the number of entries, to keep the same
> units for comparison purposes.
> This simplifies guest_iommu_get_table_mfn() by dropping the entry_size
> parameter, and simplifies the map_domain_page() handling by being able to drop
> the log_base variables.
> No functional change.

Well, not exactly - reads of those head/tail registers previously
returned the last written value afaict.

> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Acked-by: Jan Beulich <jbeulich@xxxxxxxx>

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