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Re: [Xen-devel] [PATCH v3 2/2] x86/xpti: Don't leak TSS-adjacent percpu data via Meltdown
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
- From: Jan Beulich <JBeulich@xxxxxxxx>
- Date: Tue, 30 Jul 2019 08:46:56 +0000
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- Cc: Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Delivery-date: Tue, 30 Jul 2019 08:51:45 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHVRjSFfC2E6IjOF0q7sjJMHtTAKqbi2j4A
- Thread-topic: [PATCH v3 2/2] x86/xpti: Don't leak TSS-adjacent percpu data via Meltdown
On 29.07.2019 19:38, Andrew Cooper wrote:
> --- a/xen/arch/x86/traps.c
> +++ b/xen/arch/x86/traps.c
> @@ -108,6 +108,12 @@ idt_entry_t __section(".bss.page_aligned")
> __aligned(PAGE_SIZE)
> /* Pointer to the IDT of every CPU. */
> idt_entry_t *idt_tables[NR_CPUS] __read_mostly;
>
> +/*
> + * The TSS is smaller than a page, but we give it a full page to avoid
> + * adjacent per-cpu data leaking via Meltdown when XPTI is in use.
> + */
> +DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, init_tss);
I assume there's a reason why you didn't introduce a wrapper
union to pad this to page size - I'd like to understand this
reason (see also my reply to patch 1) before acking both
patches.
Jan
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