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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v3 08/13] pci: switch pci_conf_read16 to use pci_sbdf_t
On Fri, Jun 07, 2019 at 11:22:27AM +0200, Roger Pau Monne wrote:
> This reduces the number of parameters of the function to two, and
> simplifies some of the calling sites.
>
> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
As far as AMD IOMMU
Acked-by: Brian Woods <brian.woods@xxxxxxx
> ---
> Cc: Jan Beulich <jbeulich@xxxxxxxx>
> Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Cc: Wei Liu <wl@xxxxxxx>
> Cc: George Dunlap <George.Dunlap@xxxxxxxxxxxxx>
> Cc: Ian Jackson <ian.jackson@xxxxxxxxxxxxx>
> Cc: Julien Grall <julien.grall@xxxxxxx>
> Cc: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
> Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>
> Cc: Tim Deegan <tim@xxxxxxx>
> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
> Cc: Brian Woods <brian.woods@xxxxxxx>
> Cc: Kevin Tian <kevin.tian@xxxxxxxxx>
> ---
> xen/arch/x86/dmi_scan.c | 6 +-
> xen/arch/x86/msi.c | 73 ++++++++++--------------
> xen/arch/x86/x86_64/mmconfig-shared.c | 2 +-
> xen/arch/x86/x86_64/pci.c | 27 ++++-----
> xen/drivers/char/ehci-dbgp.c | 5 +-
> xen/drivers/char/ns16550.c | 16 ++++--
> xen/drivers/passthrough/amd/iommu_init.c | 3 +-
> xen/drivers/passthrough/ats.h | 4 +-
> xen/drivers/passthrough/pci.c | 40 +++++--------
> xen/drivers/passthrough/vtd/quirks.c | 9 ++-
> xen/drivers/passthrough/x86/ats.c | 9 +--
> xen/drivers/pci/pci.c | 4 +-
> xen/drivers/video/vga.c | 8 +--
> xen/drivers/vpci/header.c | 11 ++--
> xen/drivers/vpci/msi.c | 3 +-
> xen/drivers/vpci/msix.c | 3 +-
> xen/drivers/vpci/vpci.c | 11 ++--
> xen/include/xen/pci.h | 4 +-
> 18 files changed, 99 insertions(+), 139 deletions(-)
>
> diff --git a/xen/arch/x86/dmi_scan.c b/xen/arch/x86/dmi_scan.c
> index fcdf2d3952..31caad133e 100644
> --- a/xen/arch/x86/dmi_scan.c
> +++ b/xen/arch/x86/dmi_scan.c
> @@ -469,15 +469,15 @@ static int __init ich10_bios_quirk(struct dmi_system_id
> *d)
> {
> u32 port, smictl;
>
> - if ( pci_conf_read16(0, 0, 0x1f, 0, PCI_VENDOR_ID) != 0x8086 )
> + if ( pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), PCI_VENDOR_ID) != 0x8086 )
> return 0;
>
> - switch ( pci_conf_read16(0, 0, 0x1f, 0, PCI_DEVICE_ID) ) {
> + switch ( pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), PCI_DEVICE_ID) ) {
> case 0x3a14:
> case 0x3a16:
> case 0x3a18:
> case 0x3a1a:
> - port = (pci_conf_read16(0, 0, 0x1f, 0, 0x40) & 0xff80) + 0x30;
> + port = (pci_conf_read16(PCI_SBDF(0, 0, 0x1f, 0), 0x40) & 0xff80) +
> 0x30;
> smictl = inl(port);
> /* turn off LEGACY_USB{,2}_EN if enabled */
> if ( smictl & 0x20008 )
> diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
> index 67339edc68..ed986261c3 100644
> --- a/xen/arch/x86/msi.c
> +++ b/xen/arch/x86/msi.c
> @@ -124,29 +124,20 @@ static void msix_put_fixmap(struct arch_msix *msix, int
> idx)
>
> static bool memory_decoded(const struct pci_dev *dev)
> {
> - u8 bus, slot, func;
> + pci_sbdf_t sbdf = dev->sbdf;
>
> - if ( !dev->info.is_virtfn )
> - {
> - bus = dev->bus;
> - slot = PCI_SLOT(dev->devfn);
> - func = PCI_FUNC(dev->devfn);
> - }
> - else
> + if ( dev->info.is_virtfn )
> {
> - bus = dev->info.physfn.bus;
> - slot = PCI_SLOT(dev->info.physfn.devfn);
> - func = PCI_FUNC(dev->info.physfn.devfn);
> + sbdf.bus = dev->info.physfn.bus;
> + sbdf.devfn = dev->info.physfn.devfn;
> }
>
> - return !!(pci_conf_read16(dev->seg, bus, slot, func, PCI_COMMAND) &
> - PCI_COMMAND_MEMORY);
> + return pci_conf_read16(sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY;
> }
>
> static bool msix_memory_decoded(const struct pci_dev *dev, unsigned int pos)
> {
> - u16 control = pci_conf_read16(dev->seg, dev->bus, PCI_SLOT(dev->devfn),
> - PCI_FUNC(dev->devfn),
> msix_control_reg(pos));
> + uint16_t control = pci_conf_read16(dev->sbdf, msix_control_reg(pos));
>
> if ( !(control & PCI_MSIX_FLAGS_ENABLE) )
> return false;
> @@ -211,14 +202,12 @@ static bool read_msi_msg(struct msi_desc *entry, struct
> msi_msg *msg)
> {
> msg->address_hi = pci_conf_read32(seg, bus, slot, func,
> msi_upper_address_reg(pos));
> - data = pci_conf_read16(seg, bus, slot, func,
> - msi_data_reg(pos, 1));
> + data = pci_conf_read16(dev->sbdf, msi_data_reg(pos, 1));
> }
> else
> {
> msg->address_hi = 0;
> - data = pci_conf_read16(seg, bus, slot, func,
> - msi_data_reg(pos, 0));
> + data = pci_conf_read16(dev->sbdf, msi_data_reg(pos, 0));
> }
> msg->data = data;
> break;
> @@ -337,7 +326,8 @@ void set_msi_affinity(struct irq_desc *desc, const
> cpumask_t *mask)
>
> void __msi_set_enable(u16 seg, u8 bus, u8 slot, u8 func, int pos, int enable)
> {
> - u16 control = pci_conf_read16(seg, bus, slot, func, pos + PCI_MSI_FLAGS);
> + uint16_t control = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
> + pos + PCI_MSI_FLAGS);
>
> control &= ~PCI_MSI_FLAGS_ENABLE;
> if ( enable )
> @@ -369,7 +359,7 @@ static void msix_set_enable(struct pci_dev *dev, int
> enable)
> pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX);
> if ( pos )
> {
> - control = pci_conf_read16(seg, bus, slot, func,
> msix_control_reg(pos));
> + control = pci_conf_read16(dev->sbdf, msix_control_reg(pos));
> control &= ~PCI_MSIX_FLAGS_ENABLE;
> if ( enable )
> control |= PCI_MSIX_FLAGS_ENABLE;
> @@ -414,7 +404,7 @@ static bool msi_set_mask_bit(struct irq_desc *desc, bool
> host, bool guest)
> break;
> case PCI_CAP_ID_MSIX:
> maskall = pdev->msix->host_maskall;
> - control = pci_conf_read16(seg, bus, slot, func,
> + control = pci_conf_read16(pdev->sbdf,
> msix_control_reg(entry->msi_attrib.pos));
> if ( unlikely(!(control & PCI_MSIX_FLAGS_ENABLE)) )
> {
> @@ -594,8 +584,7 @@ int setup_msi_irq(struct irq_desc *desc, struct msi_desc
> *msidesc)
>
> if ( msidesc->msi_attrib.type == PCI_CAP_ID_MSIX )
> {
> - control = pci_conf_read16(pdev->seg, pdev->bus,
> PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn), cpos);
> + control = pci_conf_read16(pdev->sbdf, cpos);
> if ( !(control & PCI_MSIX_FLAGS_ENABLE) )
> pci_conf_write16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
> PCI_FUNC(pdev->devfn), cpos,
> @@ -698,7 +687,7 @@ static int msi_capability_init(struct pci_dev *dev,
> pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI);
> if ( !pos )
> return -ENODEV;
> - control = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos));
> + control = pci_conf_read16(dev->sbdf, msi_control_reg(pos));
> maxvec = multi_msi_capable(control);
> if ( nvec > maxvec )
> return maxvec;
> @@ -769,13 +758,14 @@ static u64 read_pci_mem_bar(u16 seg, u8 bus, u8 slot,
> u8 func, u8 bir, int vf)
> unsigned int pos = pci_find_ext_capability(seg, bus,
> PCI_DEVFN(slot, func),
> PCI_EXT_CAP_ID_SRIOV);
> - u16 ctrl = pci_conf_read16(seg, bus, slot, func, pos +
> PCI_SRIOV_CTRL);
> - u16 num_vf = pci_conf_read16(seg, bus, slot, func,
> - pos + PCI_SRIOV_NUM_VF);
> - u16 offset = pci_conf_read16(seg, bus, slot, func,
> - pos + PCI_SRIOV_VF_OFFSET);
> - u16 stride = pci_conf_read16(seg, bus, slot, func,
> - pos + PCI_SRIOV_VF_STRIDE);
> + uint16_t ctrl = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
> + pos + PCI_SRIOV_CTRL);
> + uint16_t num_vf = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
> + pos + PCI_SRIOV_NUM_VF);
> + uint16_t offset = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
> + pos + PCI_SRIOV_VF_OFFSET);
> + uint16_t stride = pci_conf_read16(PCI_SBDF(seg, bus, slot, func),
> + pos + PCI_SRIOV_VF_STRIDE);
>
> if ( !pdev || !pos ||
> !(ctrl & PCI_SRIOV_CTRL_VFE) ||
> @@ -864,7 +854,7 @@ static int msix_capability_init(struct pci_dev *dev,
>
> ASSERT(pcidevs_locked());
>
> - control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos));
> + control = pci_conf_read16(dev->sbdf, msix_control_reg(pos));
> /*
> * Ensure MSI-X interrupts are masked during setup. Some devices require
> * MSI-X to be enabled before we can touch the MSI-X registers. We need
> @@ -1131,8 +1121,7 @@ static int __pci_enable_msix(struct msi_info *msi,
> struct msi_desc **desc)
> if ( !pdev || !pos )
> return -ENODEV;
>
> - control = pci_conf_read16(msi->seg, msi->bus, slot, func,
> - msix_control_reg(pos));
> + control = pci_conf_read16(pdev->sbdf, msix_control_reg(pos));
> nr_entries = multi_msix_capable(control);
> if ( msi->entry_nr >= nr_entries )
> return -EINVAL;
> @@ -1178,7 +1167,7 @@ static void __pci_disable_msix(struct msi_desc *entry)
> u8 func = PCI_FUNC(dev->devfn);
> unsigned int pos = pci_find_cap_offset(seg, bus, slot, func,
> PCI_CAP_ID_MSIX);
> - u16 control = pci_conf_read16(seg, bus, slot, func,
> + u16 control = pci_conf_read16(dev->sbdf,
> msix_control_reg(entry->msi_attrib.pos));
> bool maskall = dev->msix->host_maskall;
>
> @@ -1236,8 +1225,8 @@ int pci_prepare_msix(u16 seg, u8 bus, u8 devfn, bool
> off)
> }
> else
> {
> - u16 control = pci_conf_read16(seg, bus, slot, func,
> - msix_control_reg(pos));
> + uint16_t control = pci_conf_read16(PCI_SBDF3(seg, bus, devfn),
> + msix_control_reg(pos));
>
> rc = msix_capability_init(pdev, pos, NULL, NULL,
> multi_msix_capable(control));
> @@ -1338,7 +1327,7 @@ int pci_msi_conf_write_intercept(struct pci_dev *pdev,
> unsigned int reg,
> if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size !=
> 4 )
> return -EACCES;
>
> - cntl = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos));
> + cntl = pci_conf_read16(pdev->sbdf, msi_control_reg(pos));
> unused = ~(uint32_t)0 >> (32 - multi_msi_capable(cntl));
> for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry )
> {
> @@ -1414,8 +1403,7 @@ int pci_restore_msi_state(struct pci_dev *pdev)
> }
> else if ( !type && entry->msi_attrib.type == PCI_CAP_ID_MSIX )
> {
> - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> - msix_control_reg(pos));
> + control = pci_conf_read16(pdev->sbdf, msix_control_reg(pos));
> pci_conf_write16(pdev->seg, pdev->bus, slot, func,
> msix_control_reg(pos),
> control | (PCI_MSIX_FLAGS_ENABLE |
> @@ -1457,8 +1445,7 @@ int pci_restore_msi_state(struct pci_dev *pdev)
> {
> unsigned int cpos = msi_control_reg(pos);
>
> - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> cpos) &
> - ~PCI_MSI_FLAGS_QSIZE;
> + control = pci_conf_read16(pdev->sbdf, cpos) &
> ~PCI_MSI_FLAGS_QSIZE;
> multi_msi_enable(control, entry->msi.nvec);
> pci_conf_write16(pdev->seg, pdev->bus, slot, func, cpos,
> control);
>
> diff --git a/xen/arch/x86/x86_64/mmconfig-shared.c
> b/xen/arch/x86/x86_64/mmconfig-shared.c
> index 9e1c81dcd2..9d1db590d9 100644
> --- a/xen/arch/x86/x86_64/mmconfig-shared.c
> +++ b/xen/arch/x86/x86_64/mmconfig-shared.c
> @@ -64,7 +64,7 @@ custom_param("mmcfg", parse_mmcfg);
> static const char __init *pci_mmcfg_e7520(void)
> {
> u32 win;
> - win = pci_conf_read16(0, 0, 0, 0, 0xce);
> + win = pci_conf_read16(PCI_SBDF(0, 0, 0, 0), 0xce);
>
> win = win & 0xf000;
> if(win == 0x0000 || win == 0xf000)
> diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c
> index b70383fb03..fe36b60c50 100644
> --- a/xen/arch/x86/x86_64/pci.c
> +++ b/xen/arch/x86/x86_64/pci.c
> @@ -24,28 +24,23 @@ uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg)
> return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1);
> }
>
> -#undef PCI_CONF_ADDRESS
> -#define PCI_CONF_ADDRESS(bus, dev, func, reg) \
> - (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3))
> -
> -uint16_t pci_conf_read16(
> - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
> - unsigned int reg)
> +uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg)
> {
> - u32 value;
> -
> - if ( seg || reg > 255 )
> + if ( sbdf.seg || reg > 255 )
> {
> - pci_mmcfg_read(seg, bus, PCI_DEVFN(dev, func), reg, 2, &value);
> + uint32_t value;
> +
> + pci_mmcfg_read(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 2, &value);
> return value;
> }
> - else
> - {
> - BUG_ON((bus > 255) || (dev > 31) || (func > 7));
> - return pci_conf_read(PCI_CONF_ADDRESS(bus, dev, func, reg), reg & 2,
> 2);
> - }
> +
> + return pci_conf_read(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2);
> }
>
> +#undef PCI_CONF_ADDRESS
> +#define PCI_CONF_ADDRESS(bus, dev, func, reg) \
> + (0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | (reg & ~3))
> +
> uint32_t pci_conf_read32(
> unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
> unsigned int reg)
> diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c
> index 71f0aaa6ac..64258da2dc 100644
> --- a/xen/drivers/char/ehci-dbgp.c
> +++ b/xen/drivers/char/ehci-dbgp.c
> @@ -1016,7 +1016,7 @@ static void nvidia_set_debug_port(struct ehci_dbgp
> *dbgp, unsigned int port)
>
> static void __init detect_set_debug_port(struct ehci_dbgp *dbgp)
> {
> - if ( pci_conf_read16(0, dbgp->bus, dbgp->slot, dbgp->func,
> + if ( pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
> PCI_VENDOR_ID) == 0x10de )
> {
> dbgp_printk("using nvidia set_debug_port\n");
> @@ -1416,7 +1416,8 @@ static void ehci_dbgp_suspend(struct serial_port *port)
> stop_timer(&dbgp->timer);
> dbgp->timer.expires = 0;
>
> - dbgp->pci_cr = pci_conf_read16(0, dbgp->bus, dbgp->slot, dbgp->func,
> + dbgp->pci_cr = pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot,
> + dbgp->func),
> PCI_COMMAND);
>
> dbgp->state = dbgp_unsafe;
> diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
> index 547270d0e1..99c1254cac 100644
> --- a/xen/drivers/char/ns16550.c
> +++ b/xen/drivers/char/ns16550.c
> @@ -846,8 +846,8 @@ static void ns16550_suspend(struct serial_port *port)
>
> #ifdef CONFIG_HAS_PCI
> if ( uart->bar )
> - uart->cr = pci_conf_read16(0, uart->ps_bdf[0], uart->ps_bdf[1],
> - uart->ps_bdf[2], PCI_COMMAND);
> + uart->cr = pci_conf_read16(PCI_SBDF(0, uart->ps_bdf[0],
> uart->ps_bdf[1],
> + uart->ps_bdf[2]), PCI_COMMAND);
> #endif
> }
>
> @@ -1064,10 +1064,12 @@ pci_uart_config(struct ns16550 *uart, bool_t
> skip_amt, unsigned int idx)
> u64 size = 0;
> const struct ns16550_config_param *param = uart_param;
>
> - nextf = (f || (pci_conf_read16(0, b, d, f, PCI_HEADER_TYPE) &
> + nextf = (f || (pci_conf_read16(PCI_SBDF(0, b, d, f),
> + PCI_HEADER_TYPE) &
> 0x80)) ? f + 1 : 8;
>
> - switch ( pci_conf_read16(0, b, d, f, PCI_CLASS_DEVICE) )
> + switch ( pci_conf_read16(PCI_SBDF(0, b, d, f),
> + PCI_CLASS_DEVICE) )
> {
> case 0x0700: /* single port serial */
> case 0x0702: /* multi port serial */
> @@ -1084,8 +1086,10 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt,
> unsigned int idx)
> /* Check for params in uart_config lookup table */
> for ( i = 0; i < ARRAY_SIZE(uart_config); i++ )
> {
> - u16 vendor = pci_conf_read16(0, b, d, f, PCI_VENDOR_ID);
> - u16 device = pci_conf_read16(0, b, d, f, PCI_DEVICE_ID);
> + u16 vendor = pci_conf_read16(PCI_SBDF(0, b, d, f),
> + PCI_VENDOR_ID);
> + u16 device = pci_conf_read16(PCI_SBDF(0, b, d, f),
> + PCI_DEVICE_ID);
>
> if ( uart_config[i].vendor_id == vendor &&
> uart_config[i].dev_id == device )
> diff --git a/xen/drivers/passthrough/amd/iommu_init.c
> b/xen/drivers/passthrough/amd/iommu_init.c
> index 30de684f6d..1b3e7de10d 100644
> --- a/xen/drivers/passthrough/amd/iommu_init.c
> +++ b/xen/drivers/passthrough/amd/iommu_init.c
> @@ -798,8 +798,7 @@ static bool_t __init set_iommu_interrupt_handler(struct
> amd_iommu *iommu)
> PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf));
> return 0;
> }
> - control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf),
> - PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf),
> + control = pci_conf_read16(PCI_SBDF2(iommu->seg, iommu->bdf),
> iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS);
> iommu->msi.msi.nvec = 1;
> if ( is_mask_bit_support(control) )
> diff --git a/xen/drivers/passthrough/ats.h b/xen/drivers/passthrough/ats.h
> index bee13911c0..22ae209b37 100644
> --- a/xen/drivers/passthrough/ats.h
> +++ b/xen/drivers/passthrough/ats.h
> @@ -35,8 +35,8 @@ static inline int pci_ats_enabled(int seg, int bus, int
> devfn)
> pos = pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
> BUG_ON(!pos);
>
> - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
> - pos + ATS_REG_CTL);
> + value = pci_conf_read16(PCI_SBDF3(seg, bus, devfn), pos + ATS_REG_CTL);
> +
> return value & ATS_ENABLE;
> }
>
> diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
> index 340e957954..703056f7b9 100644
> --- a/xen/drivers/passthrough/pci.c
> +++ b/xen/drivers/passthrough/pci.c
> @@ -246,11 +246,11 @@ static void check_pdev(const struct pci_dev *pdev)
>
> if ( command_mask )
> {
> - val = pci_conf_read16(seg, bus, dev, func, PCI_COMMAND);
> + val = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
> if ( val & command_mask )
> pci_conf_write16(seg, bus, dev, func, PCI_COMMAND,
> val & ~command_mask);
> - val = pci_conf_read16(seg, bus, dev, func, PCI_STATUS);
> + val = pci_conf_read16(pdev->sbdf, PCI_STATUS);
> if ( val & PCI_STATUS_CHECK )
> {
> printk(XENLOG_INFO "%04x:%02x:%02x.%u status %04x -> %04x\n",
> @@ -265,11 +265,11 @@ static void check_pdev(const struct pci_dev *pdev)
> case PCI_HEADER_TYPE_BRIDGE:
> if ( !bridge_ctl_mask )
> break;
> - val = pci_conf_read16(seg, bus, dev, func, PCI_BRIDGE_CONTROL);
> + val = pci_conf_read16(pdev->sbdf, PCI_BRIDGE_CONTROL);
> if ( val & bridge_ctl_mask )
> pci_conf_write16(seg, bus, dev, func, PCI_BRIDGE_CONTROL,
> val & ~bridge_ctl_mask);
> - val = pci_conf_read16(seg, bus, dev, func, PCI_SEC_STATUS);
> + val = pci_conf_read16(pdev->sbdf, PCI_SEC_STATUS);
> if ( val & PCI_STATUS_CHECK )
> {
> printk(XENLOG_INFO
> @@ -289,12 +289,8 @@ static void check_pdev(const struct pci_dev *pdev)
>
> static void apply_quirks(struct pci_dev *pdev)
> {
> - uint16_t vendor = pci_conf_read16(pdev->seg, pdev->bus,
> - PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn), PCI_VENDOR_ID);
> - uint16_t device = pci_conf_read16(pdev->seg, pdev->bus,
> - PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn), PCI_DEVICE_ID);
> + uint16_t vendor = pci_conf_read16(pdev->sbdf, PCI_VENDOR_ID);
> + uint16_t device = pci_conf_read16(pdev->sbdf, PCI_DEVICE_ID);
> static const struct {
> uint16_t vendor, device;
> } ignore_bars[] = {
> @@ -387,8 +383,7 @@ static struct pci_dev *alloc_pdev(struct pci_seg *pseg,
> u8 bus, u8 devfn)
> pos = pci_find_cap_offset(pseg->nr, bus, PCI_SLOT(devfn),
> PCI_FUNC(devfn), PCI_CAP_ID_EXP);
> BUG_ON(!pos);
> - cap = pci_conf_read16(pseg->nr, bus, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), pos + PCI_EXP_DEVCAP);
> + cap = pci_conf_read16(pdev->sbdf, pos + PCI_EXP_DEVCAP);
> if ( cap & PCI_EXP_DEVCAP_PHANTOM )
> {
> pdev->phantom_stride = 8 >> MASK_EXTR(cap,
> @@ -611,8 +606,8 @@ static void pci_enable_acs(struct pci_dev *pdev)
> if (!pos)
> return;
>
> - cap = pci_conf_read16(seg, bus, dev, func, pos + PCI_ACS_CAP);
> - ctrl = pci_conf_read16(seg, bus, dev, func, pos + PCI_ACS_CTRL);
> + cap = pci_conf_read16(pdev->sbdf, pos + PCI_ACS_CAP);
> + ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_ACS_CTRL);
>
> /* Source Validation */
> ctrl |= (cap & PCI_ACS_SV);
> @@ -743,7 +738,7 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn,
> {
> unsigned int pos = pci_find_ext_capability(seg, bus, devfn,
> PCI_EXT_CAP_ID_SRIOV);
> - u16 ctrl = pci_conf_read16(seg, bus, slot, func, pos +
> PCI_SRIOV_CTRL);
> + u16 ctrl = pci_conf_read16(pdev->sbdf, pos + PCI_SRIOV_CTRL);
>
> if ( !pos )
> /* Nothing */;
> @@ -937,13 +932,13 @@ enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn)
> u8 d = PCI_SLOT(devfn), f = PCI_FUNC(devfn);
> int pos = pci_find_cap_offset(seg, bus, d, f, PCI_CAP_ID_EXP);
>
> - class_device = pci_conf_read16(seg, bus, d, f, PCI_CLASS_DEVICE);
> + class_device = pci_conf_read16(PCI_SBDF(seg, bus, d, f),
> PCI_CLASS_DEVICE);
> switch ( class_device )
> {
> case PCI_CLASS_BRIDGE_PCI:
> if ( !pos )
> return DEV_TYPE_LEGACY_PCI_BRIDGE;
> - creg = pci_conf_read16(seg, bus, d, f, pos + PCI_EXP_FLAGS);
> + creg = pci_conf_read16(PCI_SBDF(seg, bus, d, f), pos +
> PCI_EXP_FLAGS);
> switch ( (creg & PCI_EXP_FLAGS_TYPE) >> 4 )
> {
> case PCI_EXP_TYPE_PCI_BRIDGE:
> @@ -1040,8 +1035,7 @@ void pci_check_disable_device(u16 seg, u8 bus, u8 devfn)
> /* Tell the device to stop DMAing; we can't rely on the guest to
> * control it for us. */
> devfn = pdev->devfn;
> - cword = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
> - PCI_COMMAND);
> + cword = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
> pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
> PCI_COMMAND, cword & ~PCI_COMMAND_MASTER);
> }
> @@ -1209,10 +1203,7 @@ static bool_t hest_match_type(const struct
> acpi_hest_header *hest_hdr,
> PCI_SLOT(pdev->devfn),
> PCI_FUNC(pdev->devfn),
> PCI_CAP_ID_EXP);
> - u8 pcie = MASK_EXTR(pci_conf_read16(pdev->seg, pdev->bus,
> - PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn),
> - pos + PCI_EXP_FLAGS),
> + u8 pcie = MASK_EXTR(pci_conf_read16(pdev->sbdf, pos + PCI_EXP_FLAGS),
> PCI_EXP_FLAGS_TYPE);
>
> switch ( hest_hdr->type )
> @@ -1222,8 +1213,7 @@ static bool_t hest_match_type(const struct
> acpi_hest_header *hest_hdr,
> case ACPI_HEST_TYPE_AER_ENDPOINT:
> return pcie == PCI_EXP_TYPE_ENDPOINT;
> case ACPI_HEST_TYPE_AER_BRIDGE:
> - return pci_conf_read16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn), PCI_CLASS_DEVICE) ==
> + return pci_conf_read16(pdev->sbdf, PCI_CLASS_DEVICE) ==
> PCI_CLASS_BRIDGE_PCI;
> }
>
> diff --git a/xen/drivers/passthrough/vtd/quirks.c
> b/xen/drivers/passthrough/vtd/quirks.c
> index ff73b0e7f4..47597c9600 100644
> --- a/xen/drivers/passthrough/vtd/quirks.c
> +++ b/xen/drivers/passthrough/vtd/quirks.c
> @@ -74,7 +74,7 @@ int is_igd_vt_enabled_quirk(void)
> return 1;
>
> /* integrated graphics on Intel platforms is located at 0:2.0 */
> - ggc = pci_conf_read16(0, 0, IGD_DEV, 0, GGC);
> + ggc = pci_conf_read16(PCI_SBDF(0, 0, IGD_DEV, 0), GGC);
> return ( ggc & GGC_MEMORY_VT_ENABLED ? 1 : 0 );
> }
>
> @@ -88,7 +88,7 @@ static void __init cantiga_b3_errata_init(void)
> u16 vid;
> u8 did_hi, rid;
>
> - vid = pci_conf_read16(0, 0, IGD_DEV, 0, 0);
> + vid = pci_conf_read16(PCI_SBDF(0, 0, IGD_DEV, 0), 0);
> if ( vid != 0x8086 )
> return;
>
> @@ -424,11 +424,10 @@ void pci_vtd_quirk(const struct pci_dev *pdev)
> paddr_t pa;
> const char *action;
>
> - if ( pci_conf_read16(seg, bus, dev, func, PCI_VENDOR_ID) !=
> - PCI_VENDOR_ID_INTEL )
> + if ( pci_conf_read16(pdev->sbdf, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL )
> return;
>
> - switch ( pci_conf_read16(seg, bus, dev, func, PCI_DEVICE_ID) )
> + switch ( pci_conf_read16(pdev->sbdf, PCI_DEVICE_ID) )
> {
> /*
> * Mask reporting Intel VT-d faults to IOH core logic:
> diff --git a/xen/drivers/passthrough/x86/ats.c
> b/xen/drivers/passthrough/x86/ats.c
> index 59c163459a..cb022c598a 100644
> --- a/xen/drivers/passthrough/x86/ats.c
> +++ b/xen/drivers/passthrough/x86/ats.c
> @@ -34,8 +34,7 @@ int enable_ats_device(struct pci_dev *pdev, struct
> list_head *ats_list)
> dprintk(XENLOG_INFO, "%04x:%02x:%02x.%u: ATS capability found\n",
> seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
>
> - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), pos + ATS_REG_CTL);
> + value = pci_conf_read16(pdev->sbdf, pos + ATS_REG_CTL);
> if ( value & ATS_ENABLE )
> {
> struct pci_dev *other;
> @@ -58,8 +57,7 @@ int enable_ats_device(struct pci_dev *pdev, struct
> list_head *ats_list)
> if ( pos )
> {
> pdev->ats.cap_pos = pos;
> - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), pos + ATS_REG_CAP);
> + value = pci_conf_read16(pdev->sbdf, pos + ATS_REG_CAP);
> pdev->ats.queue_depth = value & ATS_QUEUE_DEPTH_MASK ?:
> ATS_QUEUE_DEPTH_MASK + 1;
> list_add(&pdev->ats.list, ats_list);
> @@ -81,8 +79,7 @@ void disable_ats_device(struct pci_dev *pdev)
>
> BUG_ON(!pdev->ats.cap_pos);
>
> - value = pci_conf_read16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
> - pdev->ats.cap_pos + ATS_REG_CTL);
> + value = pci_conf_read16(pdev->sbdf, pdev->ats.cap_pos + ATS_REG_CTL);
> value &= ~ATS_ENABLE;
> pci_conf_write16(seg, bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
> pdev->ats.cap_pos + ATS_REG_CTL, value);
> diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c
> index e3f883fc5c..5e5e0f0538 100644
> --- a/xen/drivers/pci/pci.c
> +++ b/xen/drivers/pci/pci.c
> @@ -15,7 +15,7 @@ int pci_find_cap_offset(u16 seg, u8 bus, u8 dev, u8 func,
> u8 cap)
> u8 pos = PCI_CAPABILITY_LIST;
> u16 status;
>
> - status = pci_conf_read16(seg, bus, dev, func, PCI_STATUS);
> + status = pci_conf_read16(PCI_SBDF(seg, bus, dev, func), PCI_STATUS);
> if ( (status & PCI_STATUS_CAP_LIST) == 0 )
> return 0;
>
> @@ -120,7 +120,7 @@ void pci_intx(const struct pci_dev *pdev, bool enable)
> uint8_t bus = pdev->bus;
> uint8_t slot = PCI_SLOT(pdev->devfn);
> uint8_t func = PCI_FUNC(pdev->devfn);
> - uint16_t cmd = pci_conf_read16(seg, bus, slot, func, PCI_COMMAND);
> + uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
>
> if ( enable )
> cmd &= ~PCI_COMMAND_INTX_DISABLE;
> diff --git a/xen/drivers/video/vga.c b/xen/drivers/video/vga.c
> index 78533ad0b1..454457ade8 100644
> --- a/xen/drivers/video/vga.c
> +++ b/xen/drivers/video/vga.c
> @@ -121,10 +121,9 @@ void __init video_endboot(void)
> pcidevs_unlock();
>
> if ( !pdev ||
> - pci_conf_read16(0, bus, PCI_SLOT(devfn),
> PCI_FUNC(devfn),
> + pci_conf_read16(PCI_SBDF3(0, bus, devfn),
> PCI_CLASS_DEVICE) != 0x0300 ||
> - !(pci_conf_read16(0, bus, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), PCI_COMMAND) &
> + !(pci_conf_read16(PCI_SBDF3(0, bus, devfn),
> PCI_COMMAND) &
> (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) )
> continue;
>
> @@ -141,8 +140,7 @@ void __init video_endboot(void)
> {
> case PCI_HEADER_TYPE_BRIDGE:
> case PCI_HEADER_TYPE_CARDBUS:
> - if ( pci_conf_read16(0, b, PCI_SLOT(df),
> - PCI_FUNC(df),
> + if ( pci_conf_read16(PCI_SBDF3(0, b, df),
> PCI_BRIDGE_CONTROL) &
> PCI_BRIDGE_CTL_VGA )
> continue;
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index 564c7b6a7d..0b176b490a 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -336,8 +336,7 @@ static void cmd_write(const struct pci_dev *pdev,
> unsigned int reg,
> uint32_t cmd, void *data)
> {
> uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn);
> - uint16_t current_cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> - reg);
> + uint16_t current_cmd = pci_conf_read16(pdev->sbdf, reg);
>
> /*
> * Let Dom0 play with all the bits directly except for the memory
> @@ -371,8 +370,7 @@ static void bar_write(const struct pci_dev *pdev,
> unsigned int reg,
> else
> val &= PCI_BASE_ADDRESS_MEM_MASK;
>
> - if ( pci_conf_read16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND) &
> - PCI_COMMAND_MEMORY )
> + if ( pci_conf_read16(pdev->sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY )
> {
> /* If the value written is the current one avoid printing a warning.
> */
> if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) )
> @@ -409,8 +407,7 @@ static void rom_write(const struct pci_dev *pdev,
> unsigned int reg,
> struct vpci_header *header = &pdev->vpci->header;
> struct vpci_bar *rom = data;
> uint8_t slot = PCI_SLOT(pdev->devfn), func = PCI_FUNC(pdev->devfn);
> - uint16_t cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> - PCI_COMMAND);
> + uint16_t cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
> bool new_enabled = val & PCI_ROM_ADDRESS_ENABLE;
>
> if ( (cmd & PCI_COMMAND_MEMORY) && header->rom_enabled && new_enabled )
> @@ -489,7 +486,7 @@ static int init_bars(struct pci_dev *pdev)
> return 0;
>
> /* Disable memory decoding before sizing. */
> - cmd = pci_conf_read16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND);
> + cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND);
> if ( cmd & PCI_COMMAND_MEMORY )
> pci_conf_write16(pdev->seg, pdev->bus, slot, func, PCI_COMMAND,
> cmd & ~PCI_COMMAND_MEMORY);
> diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
> index c4e1d2a411..8fe89fc912 100644
> --- a/xen/drivers/vpci/msi.c
> +++ b/xen/drivers/vpci/msi.c
> @@ -211,8 +211,7 @@ static int init_msi(struct pci_dev *pdev)
> return ret;
>
> /* Get the maximum number of vectors the device supports. */
> - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> - msi_control_reg(pos));
> + control = pci_conf_read16(pdev->sbdf, msi_control_reg(pos));
>
> /*
> * FIXME: I've only been able to test this code with devices using a
> single
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index af3ffa087d..8e6cd070d0 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -457,8 +457,7 @@ static int init_msix(struct pci_dev *pdev)
> if ( !msix_offset )
> return 0;
>
> - control = pci_conf_read16(pdev->seg, pdev->bus, slot, func,
> - msix_control_reg(msix_offset));
> + control = pci_conf_read16(pdev->sbdf, msix_control_reg(msix_offset));
>
> max_entries = msix_table_size(control);
>
> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
> index c4030333a5..1a4c2ee4f1 100644
> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -114,8 +114,7 @@ static void vpci_ignored_write(const struct pci_dev
> *pdev, unsigned int reg,
> uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg,
> void *data)
> {
> - return pci_conf_read16(pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
> - PCI_FUNC(pdev->devfn), reg);
> + return pci_conf_read16(pdev->sbdf, reg);
> }
>
> uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg,
> @@ -223,19 +222,17 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned
> int reg,
> if ( reg & 1 )
> {
> data = pci_conf_read8(sbdf, reg);
> - data |= pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn,
> - reg + 1) << 8;
> + data |= pci_conf_read16(sbdf, reg + 1) << 8;
> }
> else
> {
> - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn,
> - reg);
> + data = pci_conf_read16(sbdf, reg);
> data |= pci_conf_read8(sbdf, reg + 2) << 16;
> }
> break;
>
> case 2:
> - data = pci_conf_read16(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn, reg);
> + data = pci_conf_read16(sbdf, reg);
> break;
>
> case 1:
> diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
> index b2a62cb366..cf4c223f7c 100644
> --- a/xen/include/xen/pci.h
> +++ b/xen/include/xen/pci.h
> @@ -173,9 +173,7 @@ struct pci_dev *pci_get_pdev_by_domain(const struct
> domain *, int seg,
> void pci_check_disable_device(u16 seg, u8 bus, u8 devfn);
>
> uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg);
> -uint16_t pci_conf_read16(
> - unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
> - unsigned int reg);
> +uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int reg);
> uint32_t pci_conf_read32(
> unsigned int seg, unsigned int bus, unsigned int dev, unsigned int func,
> unsigned int reg);
> --
> 2.20.1 (Apple Git-117)
>
--
Brian Woods
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