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Re: [Xen-devel] [PATCH 13/15] x86/xstate: Add Hygon Dhyana support



On 2019/1/29 19:15, Jan Beulich wrote:
>>>> Pu Wen <puwen@xxxxxxxx> 12/20/18 2:16 PM >>>
>> --- a/xen/arch/x86/xstate.c
>> +++ b/xen/arch/x86/xstate.c
>> @@ -369,7 +369,7 @@ void xrstor(struct vcpu *v, uint64_t mask)
>> unsigned int faults, prev_faults;
>   >
>> /*
>> -     * AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
>> +     * AMD or Hygon CPUs don't save/restore FDP/FIP/FOP unless an exception
>> * is pending. Clear the x87 state here by setting it to fixed
>> * values. The hypervisor data segment can be sometimes 0 and
>> * sometimes new user value. Both should be ok. Use the FPU saved
>> @@ -377,7 +377,8 @@ void xrstor(struct vcpu *v, uint64_t mask)
>> */
>> if ( (mask & ptr->xsave_hdr.xstate_bv & X86_XCR0_FP) &&
>> !(ptr->fpu_sse.fsw & ~ptr->fpu_sse.fcw & 0x003f) &&
>> -         boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
>> +         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
>> +          boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) )
>> asm volatile ( "fnclex\n\t"        /* clear exceptions */
>> "ffree %%st(7)\n\t" /* clear stack tag */
>> "fildl %0"          /* load to clear state */
> 
> A similar change then is needed to fpu_fxrstor() as well, in case people
> disable use of XSAVE via command line option. And then there was also

The same change to fpu_fxrstor() is fine.

> a recent change to this area by Andrew, which may affect you as well.
> (Sorry, I don't have a pointer at hand.)

If Andrew's change is accepted upstream, then these changes for Hygon
are no needed any more.

Right now I wonder how to develop the following version Hygon patch set.
Following the current change logic or waiting for Andrew's changes
settled down?

Andrew,
How about your patch series "x86: Improvements to handling of various
CPU bugs"?

-- 
Regards,
Pu Wen

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