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Re: [Xen-devel] [PATCH v2 ] always clear the X2APIC_ENABLE bit for PV guest



ping?

On 10/12/2018 10:03, Xin Li wrote:
> From: Talons Lee <xin.li@xxxxxxxxxx>
> 
> Commit e657fcc clears cpu capability bit instead of using fake cpuid
> value, the EXTD should always be off for PV guest without depending
> on cpuid value. So remove the cpuid check in xen_read_msr_safe() to
> always clear the X2APIC_ENABLE bit.
> 
> Signed-off-by: Talons Lee <xin.li@xxxxxxxxxx>
> Reviewed-by: Juergen Gross <jgross@xxxxxxxx>
> 
> ---
> CC: Igor Druzhinin <igor.druzhinin@xxxxxxxxxx>
> CC: Sergey Dyasli <sergey.dyasli@xxxxxxxxxx>
> CC: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> CC: Juergen Gross <jgross@xxxxxxxx>
> 
> v2:
> don't use fake cpuid to cheat xen_read_msr_safe(), just always clear
> the EXTD bit.
> ---
>  arch/x86/xen/enlighten_pv.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index 4b20082..17cf92b 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -900,10 +900,7 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err)
>       val = native_read_msr_safe(msr, err);
>       switch (msr) {
>       case MSR_IA32_APICBASE:
> -#ifdef CONFIG_X86_X2APIC
> -             if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
> -#endif
> -                     val &= ~X2APIC_ENABLE;
> +             val &= ~X2APIC_ENABLE;
>               break;
>       }
>       return val;
> 

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