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[Xen-devel] PCI BAR sizing quirks



Roger,

in the context of some other bug report here I've been pointed
at Linux commit 6af7e4f77259ee946103387372cb159f2e99a6d4.
I think we will need to implement something similar for any
devices that may be present on x86 systems, but don't have
standard compliant behavior of registers in what normally is the
BAR range in config space, for your PVH BAR handling to not
cause boot failures.

Jan



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