/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x1>;
	model = "ZynqMP ZCU102 RevA";
	compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";

	ddr_bank1_1: ddr_bank1_1@0x0 {
		compatible = "qemu:memory-region";
		container = <0x1>;
		qemu,ram = <0x1>;
		reg = <0x0 0x0 0x30000>;
	};

	ddr_bank1_2: ddr_bank1_2@0x30000 {
		compatible = "qemu:memory-region";
		container = <0x1>;
		qemu,ram = <0x1>;
		reg = <0x0 0x30000 0x10000>;
		linux,phandle = <0x65>;
		phandle = <0x65>;
	};

	ddr_bank1_3: ddr_bank1_3@0x40000 {
		compatible = "qemu:memory-region";
		container = <0x1>;
		qemu,ram = <0x1>;
		reg = <0x0 0x40000 0x3ffc0000>;
	};

	ddr_bank2: ddr_bank2@0x40000000 {
		compatible = "qemu:memory-region";
		container = <0x1>;
		qemu,ram = <0x1>;
		reg = <0x0 0x40000000 0x40000000>;
	};

	ddr_bank3: ddr_bank3@0x800000000 {
		compatible = "qemu:memory-region-spec";
		container = <0x1>;
		qemu,ram = <0x1>;
		reg = <0x8 0x0 0x8 0x0>;
	};

	amba: amba@0 {
		#interrupt-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		interrupt-map-mask = <0x0 0x0 0xffff>;
		interrupt-map = <0x0 0x0 0x8 0x2 0x0 0x8 0x4 0x0 0x0 0x9 0x2 0x0 0x9 0x4 0x0 0x0 0xa 0x2 0x0 0xa 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xc 0x2 0x0 0xc 0x4 0x0 0x0 0xd 0x2 0x0 0xd 0x4 0x0 0x0 0xe 0x2 0x0 0xe 0x4 0x0 0x0 0xf 0x2 0x0 0xf 0x4 0x0 0x0 0x10 0x2 0x0 0x10 0x4 0x0 0x0 0x11 0x2 0x0 0x11 0x4 0x0 0x0 0x12 0x2 0x0 0x12 0x4 0x0 0x0 0x13 0x2 0x0 0x13 0x4 0x0 0x0 0x14 0x2 0x0 0x14 0x4 0x0 0x0 0x15 0x2 0x0 0x15 0x4 0x0 0x0 0x16 0x2 0x0 0x16 0x4 0x0 0x0 0x17 0x2 0x0 0x17 0x4 0x0 0x0 0x18 0x2 0x0 0x18 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x1a 0x2 0x0 0x1a 0x4 0x0 0x0 0x1b 0x2 0x0 0x1b 0x4 0x0 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0x0 0x58 0x4 0x0 0x0 0x59 0x3 0x0 0x59 0x4 0x0 0x0 0x5a 0x3 0x0 0x5a 0x4 0x0 0x0 0x5b 0x3 0x0 0x5b 0x4 0x0 0x0 0x5c 0x3 0x0 0x5c 0x4 0x0 0x0 0x5d 0x3 0x0 0x5d 0x4 0x0 0x0 0x5e 0x3 0x0 0x5e 0x4 0x0 0x0 0x5f 0x3 0x0 0x5f 0x4 0x0 0x0 0x60 0x3 0x0 0x60 0x4 0x0 0x0 0x68 0x3 0x0 0x68 0x4 0x0 0x0 0x69 0x3 0x0 0x69 0x4 0x0 0x0 0x6a 0x3 0x0 0x6a 0x4 0x0 0x0 0x6b 0x3 0x0 0x6b 0x4 0x0 0x0 0x6c 0x3 0x0 0x6c 0x4 0x0 0x0 0x6d 0x3 0x0 0x6d 0x4 0x0 0x0 0x6e 0x3 0x0 0x6e 0x4 0x0 0x0 0x6f 0x3 0x0 0x6f 0x4 0x0 0x0 0x70 0x3 0x0 0x70 0x4 0x0 0x0 0x71 0x3 0x0 0x71 0x4 0x0 0x0 0x72 0x3 0x0 0x72 0x4 0x0 0x0 0x73 0x3 0x0 0x73 0x4 0x0 0x0 0x74 0x3 0x0 0x74 0x4 0x0 0x0 0x75 0x3 0x0 0x75 0x4 0x0 0x0 0x76 0x3 0x0 0x76 0x4 0x0 0x0 0x77 0x3 0x0 0x77 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x79 0x3 0x0 0x79 0x4 0x0 0x0 0x7a 0x3 0x0 0x7a 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7c 0x3 0x0 0x7c 0x4 0x0 0x0 0x7d 0x3 0x0 0x7d 0x4 0x0 0x0 0x7e 0x3 0x0 0x7e 0x4 0x0 0x0 0x7f 0x3 0x0 0x7f 0x4 0x0 0x0 0x80 0x3 0x0 0x80 0x4 0x0 0x0 0x81 0x3 0x0 0x81 0x4 0x0 0x0 0x82 0x3 0x0 0x82 0x4 0x0 0x0 0x83 0x3 0x0 0x83 0x4 0x0 0x0 0x84 0x3 0x0 0x84 0x4 0x0 0x0 0x85 0x3 0x0 0x85 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x87 0x3 0x0 0x87 0x4 0x0 0x0 0x88 0x3 0x0 0x88 0x4 0x0 0x0 0x89 0x3 0x0 0x89 0x4 0x0 0x0 0x8a 0x3 0x0 0x8a 0x4 0x0 0x0 0x8b 0x3 0x0 0x8b 0x4 0x0 0x0 0x8c 0x3 0x0 0x8c 0x4 0x0 0x0 0x8d 0x3 0x0 0x8d 0x4 0x0 0x0 0x8e 0x3 0x0 0x8e 0x4 0x0 0x0 0x8f 0x3 0x0 0x8f 0x4 0x0 0x0 0x90 0x3 0x0 0x90 0x4 0x0 0x0 0x91 0x3 0x0 0x91 0x4 0x0 0x0 0x92 0x3 0x0 0x92 0x4 0x0 0x0 0x93 0x3 0x0 0x93 0x4 0x0 0x0 0x94 0x3 0x0 0x94 0x4 0x0 0x0 0x95 0x3 0x0 0x95 0x4 0x0 0x0 0x96 0x3 0x0 0x96 0x4 0x0 0x0 0x97 0x3 0x0 0x97 0x4 0x0 0x0 0x98 0x3 0x0 0x98 0x4 0x0 0x0 0x99 0x3 0x0 0x99 0x4 0x0 0x0 0x9a 0x3 0x0 0x9a 0x4 0x0 0x0 0x9b 0x3 0x0 0x9b 0x4>;
		#address-cells = <0x2>;
		#size-cells = <0x1>;
		linux,phandle = <0x1a>;
		phandle = <0x1a>;

		apu: apu@0xFD5C0000 {
			compatible = "xlnx,apu";
			#gpio-cells = <0x1>;
			reg = <0x0 0xfd5c0000 0x1000>;
			cpu0 = <0x4>;
			cpu1 = <0x5>;
			cpu2 = <0x6>;
			cpu3 = <0x7>;
		};

		rpu_ctrl: rpu_control@0xFF9A0000 {
			#gpio-cells = <0x1>;
			compatible = "xlnx,rpu-control";
			reg = <0x0 0xff9a0000 0x400>;
			gpio-controller;
			atcm1-for-rpu0 = <0x8>;
			btcm1-for-rpu0 = <0x9>;
			icache-for-rpu1 = <0xa>;
			dcache-for-rpu1 = <0xb>;
			gic-for-rpu = <0x3>;
			gpios = <0xc 0x6 0xc 0x7>;
			ddr-mem-for-rpu = <0xd>;
			linux,phandle = <0x5d>;
			phandle = <0x5d>;
		};

		apu_ipi: apu_ipi@0xFF300000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x23 0x4 0x0 0x0 0x0 0x3 0x0 0x23 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff300000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x0 0x0 0xf 0x0 0x0 0x10 0x0 0x0 0x11 0x0 0x0 0x12 0x0 0x0 0x13 0x0 0x0 0x14 0x0 0x0 0x15 0x0 0x0 0x16 0x0 0x0 0x17 0x0 0x0 0x18 0x0 0x0>;
			gpios = <0xe 0x20 0x0 0xf 0x20 0x0 0x10 0x20 0x0 0x11 0x20 0x0 0x12 0x20 0x0 0x13 0x20 0x0 0x14 0x20 0x0 0x15 0x20 0x0 0x16 0x20 0x0 0x17 0x20 0x0 0x18 0x20 0x0>;
			linux,phandle = <0xe>;
			phandle = <0xe>;
		};

		rpu_0_ipi: rpu_0_ipi@0xFF310000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x21 0x4 0x0 0x0 0x0 0x3 0x0 0x21 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff310000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x8 0x0 0xf 0x8 0x0 0x10 0x8 0x0 0x11 0x8 0x0 0x12 0x8 0x0 0x13 0x8 0x0 0x14 0x8 0x0 0x15 0x8 0x0 0x16 0x8 0x0 0x17 0x8 0x0 0x18 0x8 0x0>;
			gpios = <0xe 0x28 0x0 0xf 0x28 0x0 0x10 0x28 0x0 0x11 0x28 0x0 0x12 0x28 0x0 0x13 0x28 0x0 0x14 0x28 0x0 0x15 0x28 0x0 0x16 0x28 0x0 0x17 0x28 0x0 0x18 0x28 0x0>;
			linux,phandle = <0xf>;
			phandle = <0xf>;
		};

		rpu_1_ipi: rpu_1_ipi@0xFF320000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x22 0x4 0x0 0x0 0x0 0x3 0x0 0x22 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff320000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x9 0x0 0xf 0x9 0x0 0x10 0x9 0x0 0x11 0x9 0x0 0x12 0x9 0x0 0x13 0x9 0x0 0x14 0x9 0x0 0x15 0x9 0x0 0x16 0x9 0x0 0x17 0x9 0x0 0x18 0x9 0x0>;
			gpios = <0xe 0x29 0x0 0xf 0x29 0x0 0x10 0x29 0x0 0x11 0x29 0x0 0x12 0x29 0x0 0x13 0x29 0x0 0x14 0x29 0x0 0x15 0x29 0x0 0x16 0x29 0x0 0x17 0x29 0x0 0x18 0x29 0x0>;
			linux,phandle = <0x10>;
			phandle = <0x10>;
		};

		pmu_0_ipi: pmu_0_ipi@0xFF330000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-parent = <0x19>;
			interrupts = <0x13 0x0>;
			reg = <0x0 0xff330000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x10 0x0 0xf 0x10 0x0 0x10 0x10 0x0 0x11 0x10 0x0 0x12 0x10 0x0 0x13 0x10 0x0 0x14 0x10 0x0 0x15 0x10 0x0 0x16 0x10 0x0 0x17 0x10 0x0 0x18 0x10 0x0>;
			gpios = <0xe 0x30 0x0 0xf 0x30 0x0 0x10 0x30 0x0 0x11 0x30 0x0 0x12 0x30 0x0 0x13 0x30 0x0 0x14 0x30 0x0 0x15 0x30 0x0 0x16 0x30 0x0 0x17 0x30 0x0 0x18 0x30 0x0>;
			linux,phandle = <0x11>;
			phandle = <0x11>;
		};

		pmu_1_ipi: pmu_1_ipi@0xFF331000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-parent = <0x19>;
			interrupts = <0x14 0x0>;
			reg = <0x0 0xff331000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x11 0x0 0xf 0x11 0x0 0x10 0x11 0x0 0x11 0x11 0x0 0x12 0x11 0x0 0x13 0x11 0x0 0x14 0x11 0x0 0x15 0x11 0x0 0x16 0x11 0x0 0x17 0x11 0x0 0x18 0x11 0x0>;
			gpios = <0xe 0x31 0x0 0xf 0x31 0x0 0x10 0x31 0x0 0x11 0x31 0x0 0x12 0x31 0x0 0x13 0x31 0x0 0x14 0x31 0x0 0x15 0x31 0x0 0x16 0x31 0x0 0x17 0x31 0x0 0x18 0x31 0x0>;
			linux,phandle = <0x12>;
			phandle = <0x12>;
		};

		pmu_2_ipi: pmu_2_ipi@0xFF332000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-parent = <0x19>;
			interrupts = <0x15 0x0>;
			reg = <0x0 0xff332000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x12 0x0 0xf 0x12 0x0 0x10 0x12 0x0 0x11 0x12 0x0 0x12 0x12 0x0 0x13 0x12 0x0 0x14 0x12 0x0 0x15 0x12 0x0 0x16 0x12 0x0 0x17 0x12 0x0 0x18 0x12 0x0>;
			gpios = <0xe 0x32 0x0 0xf 0x32 0x0 0x10 0x32 0x0 0x11 0x32 0x0 0x12 0x32 0x0 0x13 0x32 0x0 0x14 0x32 0x0 0x15 0x32 0x0 0x16 0x32 0x0 0x17 0x32 0x0 0x18 0x32 0x0>;
			linux,phandle = <0x13>;
			phandle = <0x13>;
		};

		pmu_3_ipi: pmu_3_ipi@0xFF333000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-parent = <0x19>;
			interrupts = <0x16 0x0>;
			reg = <0x0 0xff333000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x13 0x0 0xf 0x13 0x0 0x10 0x13 0x0 0x11 0x13 0x0 0x12 0x13 0x0 0x13 0x13 0x0 0x14 0x13 0x0 0x15 0x13 0x0 0x16 0x13 0x0 0x17 0x13 0x0 0x18 0x13 0x0>;
			gpios = <0xe 0x33 0x0 0xf 0x33 0x0 0x10 0x33 0x0 0x11 0x33 0x0 0x12 0x33 0x0 0x13 0x33 0x0 0x14 0x33 0x0 0x15 0x33 0x0 0x16 0x33 0x0 0x17 0x33 0x0 0x18 0x33 0x0>;
			linux,phandle = <0x14>;
			phandle = <0x14>;
		};

		pl_0_ipi: pl_0_ipi@0xFF340000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1d 0x4 0x0 0x0 0x0 0x3 0x0 0x1d 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff340000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x18 0x0 0xf 0x18 0x0 0x10 0x18 0x0 0x11 0x18 0x0 0x12 0x18 0x0 0x13 0x18 0x0 0x14 0x18 0x0 0x15 0x18 0x0 0x16 0x18 0x0 0x17 0x18 0x0 0x18 0x18 0x0>;
			gpios = <0xe 0x34 0x0 0xf 0x34 0x0 0x10 0x34 0x0 0x11 0x34 0x0 0x12 0x34 0x0 0x13 0x34 0x0 0x14 0x34 0x0 0x15 0x34 0x0 0x16 0x34 0x0 0x17 0x34 0x0 0x18 0x34 0x0>;
			linux,phandle = <0x15>;
			phandle = <0x15>;
		};

		pl_1_ipi: pl_1_ipi@0xFF350000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1e 0x4 0x0 0x0 0x0 0x3 0x0 0x1e 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff350000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x19 0x0 0xf 0x19 0x0 0x10 0x19 0x0 0x11 0x19 0x0 0x12 0x19 0x0 0x13 0x19 0x0 0x14 0x19 0x0 0x15 0x19 0x0 0x16 0x19 0x0 0x17 0x19 0x0 0x18 0x19 0x0>;
			gpios = <0xe 0x35 0x0 0xf 0x35 0x0 0x10 0x35 0x0 0x11 0x35 0x0 0x12 0x35 0x0 0x13 0x35 0x0 0x14 0x35 0x0 0x15 0x35 0x0 0x16 0x35 0x0 0x17 0x35 0x0 0x18 0x35 0x0>;
			linux,phandle = <0x16>;
			phandle = <0x16>;
		};

		pl_2_ipi: pl_2_ipi@0xFF360000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1f 0x4 0x0 0x0 0x0 0x3 0x0 0x1f 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff360000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x1a 0x0 0xf 0x1a 0x0 0x10 0x1a 0x0 0x11 0x1a 0x0 0x12 0x1a 0x0 0x13 0x1a 0x0 0x14 0x1a 0x0 0x15 0x1a 0x0 0x16 0x1a 0x0 0x17 0x1a 0x0 0x18 0x1a 0x0>;
			gpios = <0xe 0x36 0x0 0xf 0x36 0x0 0x10 0x36 0x0 0x11 0x36 0x0 0x12 0x36 0x0 0x13 0x36 0x0 0x14 0x36 0x0 0x15 0x36 0x0 0x16 0x36 0x0 0x17 0x36 0x0 0x18 0x36 0x0>;
			linux,phandle = <0x17>;
			phandle = <0x17>;
		};

		pl_3_ipi: pl_3_ipi@0xFF370000 {
			compatible = "xlnx,zynqmp_ipi";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0>;
			interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x20 0x4 0x0 0x0 0x0 0x3 0x0 0x20 0x4>;
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			reg = <0x0 0xff370000 0x1000>;
			num-gpios = <0x40>;
			interrupt-gpios = <0xe 0x1b 0x0 0xf 0x1b 0x0 0x10 0x1b 0x0 0x11 0x1b 0x0 0x12 0x1b 0x0 0x13 0x1b 0x0 0x14 0x1b 0x0 0x15 0x1b 0x0 0x16 0x1b 0x0 0x17 0x1b 0x0 0x18 0x1b 0x0>;
			gpios = <0xe 0x37 0x0 0xf 0x37 0x0 0x10 0x37 0x0 0x11 0x37 0x0 0x12 0x37 0x0 0x13 0x37 0x0 0x14 0x37 0x0 0x15 0x37 0x0 0x16 0x37 0x0 0x17 0x37 0x0 0x18 0x37 0x0>;
			linux,phandle = <0x18>;
			phandle = <0x18>;
		};

		xlnx_zynqmp_csu_core: csu_core {
			compatible = "xlnx,zynqmp-csu-core";
			reg = <0x0 0xffca0000 0x100>;
		};

		lpd_slcr_0: zynqmp_lpd_slcr@0xFF410000 {
			compatible = "xlnx,lpd-slcr";
			reg = <0x0 0xff410000 0x9000>;
			gic-for-rpu = <0x3>;
			gic-for-apu = <0x2>;
		};

		lpd_slcr_secure: zynqmp_lpd_slcr_secure@0xFF4B0000 {
			compatible = "xlnx.lpd-slcr-secure";
			reg = <0x0 0xff4b0000 0x38>;
		};

		xppu: xppu@0 {
			compatible = "xlnx,xppu";
			reg-extended = <0x1a 0x0 0xff980000 0x10000 0x1b 0x0 0xff990000 0x0 0x1000 0x3 0x1b 0x0 0xff000000 0x0 0xfc0000 0x2 0x1b 0x0 0xfe000000 0x0 0x1000000 0x2 0x1b 0x0 0xc0000000 0x0 0x20000000 0x2>;
			mr = <0x1a>;
			interrupts = <0x58>;
		};

		smmu0: smmu0@0xFD800000 {
			compatible = "arm,mmu-500";
			reg-extended = <0x1a 0x0 0xfd800000 0x10000 0x1c 0x0 0x0 0xffffffff 0xffffffff 0x1d 0x0 0x0 0xffffffff 0xffffffff 0x1e 0x0 0x0 0xffffffff 0xffffffff 0x1f 0x0 0x0 0xffffffff 0xffffffff 0x20 0x0 0x0 0xffffffff 0xffffffff 0x21 0x0 0x0 0xffffffff 0xffffffff>;
			interrupt-parent = <0x22>;
			interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11>;
			dma = <0x23>;
			mr-0 = <0x23>;
			mr-1 = <0x23>;
			mr-2 = <0x23>;
			mr-3 = <0x24>;
			mr-4 = <0x25>;
			mr-5 = <0x26>;
		};

		smmu_reg: smmu0@0xFD5F0000 {
			compatible = "xlnx,smmu-reg";
			reg = <0x0 0xfd5f0000 0x1000>;
			interrupt-controller;
			interrupts = <0x9b>;
			linux,phandle = <0x22>;
			phandle = <0x22>;
		};

		cci_mem1: cci_mem1@0 {
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			#priority-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
			linux,phandle = <0x27>;
			phandle = <0x27>;
		};

		cci_mem2: cci_mem2@0 {
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			#priority-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
			linux,phandle = <0x28>;
			phandle = <0x28>;
		};

		cci: cci@0xFD6E0000 {
			compatible = "arm,cci-400";
			gpio-controller;
			#gpio-cells = <0x1>;
			reg-extended = <0x1a 0x0 0xfd6e0000 0xf000 0x23 0x0 0x0 0xffffffff 0xffffffff 0x2>;
			M0 = <0x1b>;
			M1 = <0x27>;
			M2 = <0x28>;
			linux,phandle = <0x2b>;
			phandle = <0x2b>;
		};

		ocm_xmpu: ocm_xmpu@0xFFA70000 {
			compatible = "xlnx,xmpu";
			interrupts = <0x58>;
			reg-extended = <0x1a 0x0 0xffa70000 0x1000 0x1a 0x0 0xfffc0000 0x40000>;
			protected-mr = <0x29>;
			mr-0 = <0x1a>;
			protected-base = <0xfffc0000>;
		};

		ddr_xmpu0: ddr_xmpu0_@_DDR_XMPU0_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd000000 0x1000 0x2a 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x2a>;
		};

		ddr_xmpu1: ddr_xmpu1_@_DDR_XMPU1_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd010000 0x1000 0x27 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x27>;
			gpios = <0x2b 0x0>;
		};

		ddr_xmpu2: ddr_xmpu2_@_DDR_XMPU2_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd020000 0x1000 0x28 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x28>;
			gpios = <0x2b 0x1>;
		};

		ddr_xmpu3: ddr_xmpu3_@_DDR_XMPU3_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd030000 0x1000 0x24 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x24>;
		};

		ddr_xmpu4: ddr_xmpu4_@_DDR_XMPU4_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd040000 0x1000 0x25 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x25>;
		};

		ddr_xmpu5: ddr_xmpu5_@_DDR_XMPU5_CFG {
			compatible = "xlnx,xmpu";
			interrupts = <0x86>;
			reg-extended = <0x1a 0x0 0xfd050000 0x1000 0x26 0x0 0x0 0x0 0x80000000 0x0>;
			align = <0x1>;
			protected-mr = <0x1>;
			protected-base = <0x0>;
			mr-0 = <0x26>;
		};

		ps7_afi_0: ps7-afi@0xFD360000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd360000 0x1000>;
		};

		ps7_afi_1: ps7-afi@0xFD370000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd370000 0x1000>;
		};

		ps7_afi_2: ps7-afi@0xFD380000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd380000 0x1000>;
		};

		ps7_afi_3: ps7-afi@0xFD390000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd390000 0x1000>;
		};

		ps7_afi_4: ps7-afi@0xFD3A0000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd3a0000 0x1000>;
		};

		ps7_afi_5: ps7-afi@0xFD3B0000 {
			compatible = "xlnx,ps7-afi-1.00.a";
			reg = <0x0 0xfd3b0000 0x1000>;
		};

		gdma0_mr: gdma0mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma0_mattr: gdma0mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14e8>;
			linux,phandle = <0x2c>;
			phandle = <0x2c>;
		};

		gdma0: gdma0@0xFD500000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd500000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x7c>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x2c>;
		};

		gdma1_mr: gdma1mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma1_mattr: gdma1mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14e9>;
			linux,phandle = <0x2d>;
			phandle = <0x2d>;
		};

		gdma1: gdma1@0xFD510000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd510000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x7d>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x2d>;
		};

		gdma2_mr: gdma2mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma2_mattr: gdma2mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14ea>;
			linux,phandle = <0x2e>;
			phandle = <0x2e>;
		};

		gdma2: gdma2@0xFD520000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd520000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x7e>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x2e>;
		};

		gdma3_mr: gdma3mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma3_mattr: gdma3mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14eb>;
			linux,phandle = <0x2f>;
			phandle = <0x2f>;
		};

		gdma3: gdma3@0xFD530000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd530000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x7f>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x2f>;
		};

		gdma4_mr: gdma4mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma4_mattr: gdma4mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14ec>;
			linux,phandle = <0x30>;
			phandle = <0x30>;
		};

		gdma4: gdma4@0xFD540000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd540000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x80>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x30>;
		};

		gdma5_mr: gdma5mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma5_mattr: gdma5mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14ed>;
			linux,phandle = <0x31>;
			phandle = <0x31>;
		};

		gdma5: gdma5@0xFD550000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd550000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x81>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x31>;
		};

		gdma6_mr: gdma6mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma6_mattr: gdma6mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14ee>;
			linux,phandle = <0x32>;
			phandle = <0x32>;
		};

		gdma6: gdma6@0xFD560000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd560000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x82>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x32>;
		};

		gdma7_mr: gdma7mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		gdma7_mattr: gdma7mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x14ef>;
			linux,phandle = <0x33>;
			phandle = <0x33>;
		};

		gdma7: gdma7@0xFD570000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xfd570000 0x1000>;
			bus-width = <0x80>;
			interrupts = <0x83>;
			#stream-id-cells = <0x1>;
			dma = <0x21>;
			memattr = <0x33>;
		};

		crf: crf@0xFD1A0000 {
			compatible = "xlnx,zynqmp_crf";
			reg = <0x0 0xfd1a0000 0x110>;
			gpio-controller;
			#gpio-cells = <0x1>;
			linux,phandle = <0x53>;
			phandle = <0x53>;
		};

		xlnx_dpdma: axidpdma@0xFD4C0000 {
			compatible = "xlnx,axi-dpdma-1.0";
			reg = <0x0 0xfd4c0000 0x1000>;
			clocks = <0x34>;
			clock-names = "axi_clk";
			xlnx,axi-clock-freq = <0xbebc200>;
			interrupts = <0x7a>;
			dma = <0x1b>;
			dma-channels = <0x6>;
			#dma-cells = <0x1>;
			linux,phandle = <0x36>;
			phandle = <0x36>;

			dma-video0channel@fe4c0000 {
				compatible = "xlnx,video0";
			};

			dma-video1channel@fe4c0000 {
				compatible = "xlnx,video1";
			};

			dma-video2channel@fe4c0000 {
				compatible = "xlnx,video2";
			};

			dma-graphicschannel@fe4c0000 {
				compatible = "xlnx,graphics";
			};

			dma-audio0channel@fe4c0000 {
				compatible = "xlnx,audio0";
			};

			dma-audio1channel@fe4c0000 {
				compatible = "xlnx,audio1";
			};
		};

		dp_aclk: clock0 {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2faf080>;
			clock-accuracy = <0x64>;
			linux,phandle = <0x35>;
			phandle = <0x35>;
		};

		dummy_clk: clock1 {
			compatible = "dummy-clk";
			#clock-cells = <0x0>;
			clock-frequency = <0x2faf080>;
			linux,phandle = <0x34>;
			phandle = <0x34>;
		};

		xlnx_dp_sub: dp_sub@fd4aa000 {
			compatible = "xlnx,v-dp-sub-1.6";
			reg = <0x0 0xfd4aa000 0x4000>;
			xlnx,output-fmt = "rgb";
			linux,phandle = <0x37>;
			phandle = <0x37>;
		};

		xlnx_dp: dp@0xFD4A0000 {
			compatible = "xlnx,v-dp-4.1";
			reg = <0x0 0xfd4a0000 0x1000>;
			interrupts = <0x77>;
			clock-names = "aclk";
			clocks = <0x35>;
			dpdma = <0x36>;
			xlnx,dp-version = "v1.2";
			xlnx,max-lanes = <0x2>;
			xlnx,max-link-rate = <0x278d0>;
			xlnx,max-bpc = <0x10>;
			xlnx,max-pclock = <0x7530>;
			xlnx,enable-ycrcb;
			xlnx,colormetry = "rgb";
			xlnx,bpc = <0x8>;
			xlnx,dp-sub = <0x37>;
			linux,phandle = <0x38>;
			phandle = <0x38>;
		};

		xilinx_drm {
			compatible = "xlnx,drm";
			xlnx,encoder-slave = <0x38>;
			clocks = <0x34 0x0>;
			xlnx,connector-type = "DisplayPort";
			xlnx,dp-sub = <0x37>;

			planes {
				xlnx,pixel-format = "rgb565";

				plane0 {
					dmas = <0x36 0x3>;
					dma-names = "dma";
				};

				plane1 {
					dmas = <0x36 0x0>;
					dma-names = "dma";
				};
			};
		};

		ddrphy_0: ddr-phy@0xFD080000 {
			compatible = "xlnx,zynqmp-ddr-phy";
			reg = <0x0 0xfd080000 0x2000>;
		};

		ddrc_0: memory-controller@0xFD070000 {
			compatible = "xlnx,zynqmp-ddrc";
			reg = <0x0 0xfd070000 0x1000>;
		};

		swdt@0xFF150000 {
			compatible = "xlnx,swdt";
			reg = <0x0 0xff150000 0x10>;
			pclk = <0xf4240>;
		};

		wdt@0xFD4D0000 {
			compatible = "xlnx,swdt";
			reg = <0x0 0xfd4d0000 0x10>;
			pclk = <0xf4240>;
		};

		csu_wdt@0xFFCB0000 {
			compatible = "xlnx,swdt";
			reg = <0x0 0xffcb0000 0x10>;
			pclk = <0xf4240>;
		};

		iou_slcr_0: zynqmp_iou_slcr@0xFF180000 {
			compatible = "xilinx,zynqmp-iou-slcr";
			reg = <0x0 0xff180000 0x1000>;
			gpio-controller;
			#gpio-cells = <0x2>;
			mio-bank0-1.8v = <0x1>;
			mio-bank1-1.8v = <0x1>;
			mio-bank2-1.8v = <0x1>;
			linux,phandle = <0x42>;
			phandle = <0x42>;
		};

		ps7_can_0: ps7-can@0xFF060000 {
			clock-names = "ref_clk", "aper_clk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-can-1.00.a";
			interrupts = <0x17>;
			reg = <0x0 0xff060000 0x1000>;
			xlnx,can-clk-freq-hz = <0x5f5e100>;
		};

		ps7_can_1: ps7-can@0xFF070000 {
			clock-names = "ref_clk", "aper_clk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-can-1.00.a";
			interrupts = <0x18>;
			reg = <0x0 0xff070000 0x1000>;
			xlnx,can-clk-freq-hz = <0x5f5e100>;
		};

		serdes_0: serdes@0xFD400000 {
			compatible = "xlnx,zynqmp-serdes";
			reg = <0x0 0xfd400000 0x20000>;
		};

		gem0: ethernet@0xFF0B0000 {
			#stream-id-cells = <0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "hclk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
			interrupts = <0x39 0x39>;
			dma = <0x1e>;
			memattr = <0x3a>;
			local-mac-address = [00 0a 35 00 02 90];
			reg = <0x0 0xff0b0000 0x1000>;
			num-priority-queues = <0x2>;
			revision = <0x40070106>;
		};

		gem1: ethernet@0xFF0C0000 {
			#stream-id-cells = <0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "hclk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
			interrupts = <0x3b 0x3b>;
			dma = <0x1e>;
			memattr = <0x3b>;
			local-mac-address = [00 0a 35 00 02 90];
			reg = <0x0 0xff0c0000 0x1000>;
			num-priority-queues = <0x2>;
			revision = <0x40070106>;
		};

		gem2: ethernet@0xFF0D0000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "hclk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
			interrupts = <0x3d 0x3d>;
			dma = <0x1e>;
			memattr = <0x3c>;
			local-mac-address = [00 0a 35 00 02 90];
			reg = <0x0 0xff0d0000 0x1000>;
			num-priority-queues = <0x2>;
			revision = <0x40070106>;
		};

		gem3: ethernet@0xFF0E0000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "hclk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
			interrupts = <0x3f 0x3f>;
			dma = <0x1e>;
			memattr = <0x3d>;
			local-mac-address = [00 0a 35 00 02 90];
			reg = <0x0 0xff0e0000 0x1000>;
			num-priority-queues = <0x2>;
			revision = <0x40070106>;
			mdio = <0x3e>;
		};

		sata: ahci@0xFD0C0000 {
			compatible = "generic-ahci", "sysbus-ahci";
			reg = <0x0 0xfd0c0000 0x2000>;
			interrupts = <0x85>;
			num-ports = <0x2>;
			dma = <0x1b>;
		};

		lpd_gpv@0xFE100000 {
			compatible = "xlnx,lpd-gpv";
			reg = <0x0 0xfe100000 0xc8130>;
		};

		usb3_0: usb3@0xFE200000 {
			compatible = "qemu,irq-test-component";
			reg = <0x0 0xfe200000 0x4000>;
			interrupts = <0x4b>;
		};

		usb3_1: usb3@0xFE300000 {
			compatible = "qemu,irq-test-component";
			reg = <0x0 0xfe300000 0x4000>;
			interrupts = <0x4c>;
		};

		nand: arasan_nfc@0xFF100000 {
			compatible = "arasan,nfc";
			reg = <0x0 0xff100000 0x1000>;
			interrupts = <0xe>;
			dma = <0x1b>;
			has-mdma = <0x1>;

			nand {
				#address-cells = <0x1>;
				#size-cells = <0x1>;

				partition@0 {
					label = "all";
					reg = <0x0 0x100000>;
				};
			};
		};

		psu_gpio: psu_gpio@0xFF0A0000 {
			#gpio-cells = <0x1>;
			compatible = "xlnx,zynqmp-gpio";
			gpio-controller;
			interrupts = <0x10>;
			reg = <0x0 0xff0a0000 0x1000>;
		};

		qspi_dma_0: csu_dma@0xFF0F0800 {
			compatible = "zynqmp,csu-dma";
			interrupts = <0xf>;
			#stream-id-cells = <0x1>;
			reg = <0x0 0xff0f0800 0x800>;
			dma = <0x1e>;
			memattr = <0x3f>;
			is-dst = <0x1>;
			linux,phandle = <0x40>;
			phandle = <0x40>;
		};

		ps7_qspi_0: ps7-qspi@0xFF0F0000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#bus-cells = <0x1>;
			clock-names = "ref_clk", "pclk";
			compatible = "xlnx,usmp-gqspi", "cdns,spi-r1p6";
			stream-connected-dma = <0x40>;
			clocks = <0x39 0x39>;
			dma = <0x1b>;
			interrupts = <0xf>;
			num-ss-bits = <0x2>;
			reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
			speed-hz = <0x989680>;
			xlnx,fb-clk = <0x1>;
			xlnx,qspi-clk-freq-hz = <0xbebc200>;
			xlnx,qspi-mode = <0x2>;

			qspi_flash_lcs_lb: qspi_flash_lcs_lb@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "n25q512a11", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x0 0x0>;

				qspi_flash_lcs_lb@0x00000000 {
					label = "qspi_flash_lcs_lb";
					reg = <0x0 0x2000000>;
				};
			};

			qspi_flash_ucs_ub: qspi_flash_ucs_ub@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "n25q512a11", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x1 0x1>;

				qspi_flash_ucs_ub@0x00000000 {
					label = "qspi_flash_ucs_ub";
					reg = <0x0 0x2000000>;
				};
			};
		};

		sd_clk: sd_clk {
			#clock-cells = <0x0>;
			clock-frequency = <0x17d7840>;
			compatible = "fixed-clock";
			linux,phandle = <0x41>;
			phandle = <0x41>;
		};

		ps7_sd_0: ps7-sdio@0xFF160000 {
			clock-names = "ref_clk", "aper_clk";
			clock-frequency = <0x17d7840>;
			compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
			clocks = <0x41 0x41>;
			drive-index = <0x0>;
			interrupts = <0x30>;
			reg = <0x0 0xff160000 0x1000>;
			dma = <0x1b>;
			gpios = <0x42 0x0 0x0>;
			gpio-names = "SLOTTYPE";
			is-mmc = <0x0>;
			xlnx,has-cd = <0x1>;
			xlnx,has-power = <0x0>;
			xlnx,has-wp = <0x1>;
			xlnx,sdio-clk-freq-hz = <0x2faf080>;
		};

		ps7_sd_1: ps7-sdio@0xFF170000 {
			clock-names = "ref_clk", "aper_clk";
			compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
			clocks = <0x39 0x39>;
			drive-index = <0x1>;
			interrupts = <0x31>;
			reg = <0x0 0xff170000 0x1000>;
			dma = <0x1b>;
			gpios = <0x42 0x1 0x0>;
			gpio-names = "SLOTTYPE";
			is-mmc = <0x1>;
			xlnx,has-cd = <0x1>;
			xlnx,has-power = <0x0>;
			xlnx,has-wp = <0x1>;
			xlnx,sdio-clk-freq-hz = <0x2faf080>;
		};

		ps7_spi_0: ps7-spi@0xFF040000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "ref_clk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "cdns,spi-r1p6";
			interrupts = <0x13>;
			num-ss-bits = <0x4>;
			reg = <0x0 0xff040000 0x1000>;

			spi0_flash0: spi0_flash0@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x0 0x0>;

				spi0_flash0@0x00000000 {
					label = "spi0_flash0";
					reg = <0x0 0x100000>;
				};
			};

			spi0_flash1: spi0_flash1@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x1 0x0>;

				spi0_flash1@0x00000000 {
					label = "spi0_flash1";
					reg = <0x0 0x100000>;
				};
			};

			spi0_flash2: spi0_flash2@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x2 0x0>;

				spi0_flash2@0x00000000 {
					label = "spi0_flash2";
					reg = <0x0 0x100000>;
				};
			};

			spi0_flash3: spi0_flash3@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x3 0x0>;

				spi0_flash3@0x00000000 {
					label = "spi0_flash3";
					reg = <0x0 0x100000>;
				};
			};
		};

		ps7_spi_1: ps7-spi@0xFF050000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-names = "ref_clk", "pclk";
			clocks = <0x39 0x39>;
			compatible = "cdns,spi-r1p6";
			interrupts = <0x14>;
			num-ss-bits = <0x4>;
			reg = <0x0 0xff050000 0x1000>;

			spi1_flash0: spi1_flash0@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x0 0x0>;

				spi1_flash0@0x00000000 {
					label = "spi1_flash0";
					reg = <0x0 0x100000>;
				};
			};

			spi1_flash1: spi1_flash1@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x1 0x0>;

				spi1_flash1@0x00000000 {
					label = "spi1_flash1";
					reg = <0x0 0x100000>;
				};
			};

			spi1_flash2: spi1_flash2@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x2 0x0>;

				spi1_flash2@0x00000000 {
					label = "spi1_flash2";
					reg = <0x0 0x100000>;
				};
			};

			spi1_flash3: spi1_flash3@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				#bus-cells = <0x1>;
				compatible = "sst25wf080", "st,m25p80";
				spi-max-frequency = <0x2faf080>;
				reg = <0x3 0x0>;

				spi1_flash3@0x00000000 {
					label = "spi1_flash3";
					reg = <0x0 0x100000>;
				};
			};
		};

		ps7_ttc_0: ps7-ttc@0xFF110000 {
			clocks = <0x39>;
			compatible = "xlnx,ps7-ttc-1.00.a";
			interrupts = <0x24 0x25 0x26>;
			reg = <0x0 0xff110000 0x1000>;
			timer-width = <0x20>;
		};

		ps7_ttc_1: ps7-ttc@0xFF120000 {
			clocks = <0x39>;
			compatible = "xlnx,ps7-ttc-1.00.a";
			interrupts = <0x27 0x28 0x29>;
			reg = <0x0 0xff120000 0x1000>;
			timer-width = <0x20>;
		};

		ps7_ttc_2: ps7-ttc@0xFF130000 {
			clocks = <0x39>;
			compatible = "xlnx,ps7-ttc-1.00.a";
			interrupts = <0x2a 0x2b 0x2c>;
			reg = <0x0 0xff130000 0x1000>;
			timer-width = <0x20>;
		};

		ps7_ttc_3: ps7-ttc@0xFF140000 {
			clocks = <0x39>;
			compatible = "xlnx,ps7-ttc-1.00.a";
			interrupts = <0x2d 0x2e 0x2f>;
			reg = <0x0 0xff140000 0x1000>;
			timer-width = <0x20>;
		};

		uart_clk: uart_clk {
			#clock-cells = <0x0>;
			clock-frequency = <0x17d7840>;
			compatible = "fixed-clock";
			linux,phandle = <0x43>;
			phandle = <0x43>;
		};

		ps7_uart_0: serial@0xFF000000 {
			compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
			current-speed = <0x1c200>;
			interrupts = <0x15>;
			port-number = <0x1>;
			reg = <0x0 0xff000000 0x1000>;
			xlnx,has-modem = <0x0>;
			xlnx,uart-clk-freq-hz = <0x2faf080>;
			clock-names = "uart_clk", "pclk";
			clocks = <0x43 0x43>;
			ttrig-polarity = <0x1>;
		};

		ps7_uart_1: serial@0xFF010000 {
			compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
			current-speed = <0x1c200>;
			interrupts = <0x16>;
			port-number = <0x0>;
			reg = <0x0 0xff010000 0x1000>;
			xlnx,has-modem = <0x0>;
			xlnx,uart-clk-freq-hz = <0x2faf080>;
			clock-names = "uart_clk", "pclk";
			clocks = <0x43 0x43>;
			ttrig-polarity = <0x1>;
			status = "disabled";
		};

		ocm_ctrl0: ocm_ctrl@0xFF960000 {
			compatible = "xlnx,zynqmp-ocmc";
			memsize = <0x40000>;
			reg = <0x0 0xff960000 0x1000>;
		};

		adma0_mr: adma0mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma0_mattr: adma0mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x868>;
			linux,phandle = <0x44>;
			phandle = <0x44>;
		};

		adma0: adma0@0xFFA80000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffa80000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x4d>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x44>;
		};

		adma1_mr: adma1mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma1_mattr: adma1mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x869>;
			linux,phandle = <0x45>;
			phandle = <0x45>;
		};

		adma1: adma1@0xFFA90000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffa90000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x4e>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x45>;
		};

		adma2_mr: adma2mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma2_mattr: adma2mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86a>;
			linux,phandle = <0x46>;
			phandle = <0x46>;
		};

		adma2: adma2@0xFFAA0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffaa0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x4f>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x46>;
		};

		adma3_mr: adma3mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma3_mattr: adma3mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86b>;
			linux,phandle = <0x47>;
			phandle = <0x47>;
		};

		adma3: adma3@0xFFAB0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffab0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x50>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x47>;
		};

		adma4_mr: adma4mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma4_mattr: adma4mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86c>;
			linux,phandle = <0x48>;
			phandle = <0x48>;
		};

		adma4: adma4@0xFFAC0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffac0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x51>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x48>;
		};

		adma5_mr: adma5mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma5_mattr: adma5mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86d>;
			linux,phandle = <0x49>;
			phandle = <0x49>;
		};

		adma5: adma5@0xFFAD0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffad0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x52>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x49>;
		};

		adma6_mr: adma6mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma6_mattr: adma6mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86e>;
			linux,phandle = <0x4a>;
			phandle = <0x4a>;
		};

		adma6: adma6@0xFFAE0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffae0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x53>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x4a>;
		};

		adma7_mr: adma7mr {
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges;
		};

		adma7_mattr: adma7mattr {
			compatible = "qemu:memory-transaction-attr";
			secure = <0x0>;
			master-id = <0x86f>;
			linux,phandle = <0x4b>;
			phandle = <0x4b>;
		};

		adma7: adma7@0xFFAF0000 {
			compatible = "xlnx,zdma";
			reg = <0x0 0xffaf0000 0x1000>;
			bus-width = <0x40>;
			interrupts = <0x54>;
			#stream-id-cells = <0x1>;
			dma = <0x1e>;
			memattr = <0x4b>;
		};

		crl: crl@0xFF5E0000 {
			compatible = "xlnx,zynqmp-crl";
			reg = <0x0 0xff5e0000 0x1000>;
			gpio-controller;
			#gpio-cells = <0x1>;
			num-gpios = <0x3>;
			gpios = <0xc 0x1a>;
			linux,phandle = <0x4c>;
			phandle = <0x4c>;
		};

		zynqmp_anms: zynqmp_anms@0xFFA50000 {
			compatible = "xlnx,zynqmp_ams";
			reg = <0x0 0xffa50000 0x68>;
			gpio-controller;
			#gpio-cells = <0x2>;
		};

		zynqmp_sysmon_ps: zynqmp_sysmon_ps@0xFFA50800 {
			compatible = "xlnx,zynqmp_sysmon";
			reg = <0x0 0xffa50800 0x200>;
			gpio-controller;
			#gpio-cells = <0x2>;
		};

		zynqmp_sysmon_pl: zynqmp_sysmon_pl@0xFFA50C00 {
			compatible = "xlnx,zynqmp_sysmon";
			reg = <0x0 0xffa50c00 0x200>;
			gpio-controller;
			#gpio-cells = <0x2>;
		};

		zynqmp_rtc: zynqmp_rtc@0xFFA60000 {
			compatible = "xlnx-zynmp.rtc";
			reg = <0x0 0xffa60000 0x100>;
		};

		dummy_gpio: dummy_gpio@0 {
			gpio-controller;
			#gpio-cells = <0x1>;
		};

		pmu_global: pmu_global@0xFFD80000 {
			compatible = "xlnx,pmu_global";
			reg = <0x0 0xffd80000 0x40000>;
			gpio-controller;
			#gpio-cells = <0x1>;
			num-gpios = <0x1a>;
			ignore-pwr-req = <0x1>;
			linux,phandle = <0xc>;
			phandle = <0xc>;
		};

		cxtsgen: cxtsgen@0xFF250000 {
			compatible = "arm.generic-timer";
			reg = <0x0 0xff260000 0x1000>;
		};

		ps_reset@0 {
			compatible = "qemu,reset-device";
			gpios = <0x4c 0x2 0xc 0x3>;
		};

		pcie_attrib: pcie_attrib@0xFD480000 {
			compatible = "xlnx.nwl-pcie-attrib";
			reg = <0x0 0xfd480000 0x1000>;
			interrupts = <0x76>;
		};

		pcie_main: pcie_main@0xFD0E0000 {
			compatible = "xlnx.nwl-pcie-main";
			reg-extended = <0x1a 0x0 0xfd0e0000 0x1000 0x4d 0x0 0xfd480000 0x0 0x1000 0x2 0x1a 0x80 0x0 0x10000000 0x4e 0x0 0x0 0xffffffff 0xffffffff 0x0>;
			interrupts = <0x74 0x72 0x73>;
			dma = <0x4d>;
			memattr = <0x4f>;
		};

		zynqmp_boot: zynqmp_boot@0 {
			compatible = "xlnx,zynqmp-boot";
			dma = <0x1a>;
		};

		rpu0_for_main_bus {
			compatible = "qemu:memory-region";
			alias = <0x50>;
			reg = <0x0 0xffe00000 0x60000>;
		};

		rpu1_for_main_bus {
			compatible = "qemu:memory-region";
			alias = <0x51>;
			reg = <0x0 0xffe90000 0x50000>;
		};

		i2c1: i2c1@0xFF030000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clocks = <0x39>;
			compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10";
			interrupts = <0x12>;
			reg = <0x0 0xff030000 0x1000>;

			i2cswitch@74 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				compatible = "nxp,pca9548";
				reg = <0x74>;

				i2c@0 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x0>;

					eeprom@54 {
						compatible = "at,24c08";
						reg = <0x54>;
					};

					eeprom@55 {
						compatible = "at,24c08";
						reg = <0x55>;
					};

					eeprom@56 {
						compatible = "at,24c08";
						reg = <0x56>;
					};

					eeprom@57 {
						compatible = "at,24c08";
						reg = <0x57>;
					};
				};

				i2c@2 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x2>;

					si570_1: clock-generator@5d {
						compatible = "silabs,si57x";
						reg = <0x5d>;
						temperature-stability = <0x32>;
					};
				};

				i2c@3 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x3>;

					si570_2: clock-generator@5e {
						compatible = "silabs,si57x";
						reg = <0x5d>;
						temperature-stability = <0x32>;
					};
				};
			};
		};
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu0: apu_cpu@0 {
			compatible = "cortex-a53-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x410fd034>;
			arm,ctr = <0x83338003>;
			arm,clidr = <0x9200003>;
			arm,id_pfr0 = <0x1231>;
			arm,ccsidr0 = <0x701fe019>;
			arm,ccsidr1 = <0x201fe019>;
			arm,mp-affinity = <0x0>;
			enable-method = "psci";
			reg = <0x0>;
			arm,reset-hivecs = <0x1>;
			arm,rvbar = <0xffff0000>;
			#interrupt-cells = <0x1>;
			arm,reset-cbar = <0xfd3fe000>;
			mr = <0x52>;
			memory = <0x52>;
			gpios = <0x53 0x0>;
			gpio-names = "rst_cntrl";
			gdb-id = "Cortex-A53 #0";
			memattr_s = <0x54>;
			memattr_ns = <0x55>;
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		cpu1: apu_cpu@1 {
			compatible = "cortex-a53-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x410fd034>;
			arm,ctr = <0x83338003>;
			arm,clidr = <0x9200003>;
			arm,id_pfr0 = <0x1231>;
			arm,ccsidr0 = <0x701fe019>;
			arm,ccsidr1 = <0x201fe019>;
			arm,mp-affinity = <0x1>;
			enable-method = "psci";
			reg = <0x1>;
			arm,reset-hivecs = <0x1>;
			arm,rvbar = <0xffff0000>;
			#interrupt-cells = <0x1>;
			arm,reset-cbar = <0xfd3fe000>;
			mr = <0x52>;
			memory = <0x52>;
			gpios = <0x53 0x1>;
			gpio-names = "rst_cntrl";
			gdb-id = "Cortex-A53 #1";
			memattr_s = <0x56>;
			memattr_ns = <0x57>;
			linux,phandle = <0x5>;
			phandle = <0x5>;
		};

		cpu2: apu_cpu@2 {
			compatible = "cortex-a53-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x410fd034>;
			arm,ctr = <0x83338003>;
			arm,clidr = <0x9200003>;
			arm,id_pfr0 = <0x1231>;
			arm,ccsidr0 = <0x701fe019>;
			arm,ccsidr1 = <0x201fe019>;
			arm,mp-affinity = <0x2>;
			enable-method = "psci";
			reg = <0x2>;
			arm,reset-hivecs = <0x1>;
			arm,rvbar = <0xffff0000>;
			#interrupt-cells = <0x1>;
			arm,reset-cbar = <0xfd3fe000>;
			mr = <0x52>;
			memory = <0x52>;
			gpios = <0x53 0x2>;
			gpio-names = "rst_cntrl";
			gdb-id = "Cortex-A53 #2";
			memattr_s = <0x58>;
			memattr_ns = <0x59>;
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		cpu3: apu_cpu@3 {
			compatible = "cortex-a53-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x410fd034>;
			arm,ctr = <0x83338003>;
			arm,clidr = <0x9200003>;
			arm,id_pfr0 = <0x1231>;
			arm,ccsidr0 = <0x701fe019>;
			arm,ccsidr1 = <0x201fe019>;
			arm,mp-affinity = <0x3>;
			enable-method = "psci";
			reg = <0x3>;
			arm,reset-hivecs = <0x1>;
			arm,rvbar = <0xffff0000>;
			#interrupt-cells = <0x1>;
			arm,reset-cbar = <0xfd3fe000>;
			mr = <0x52>;
			memory = <0x52>;
			gpios = <0x53 0x3>;
			gpio-names = "rst_cntrl";
			gdb-id = "Cortex-A53 #3";
			memattr_s = <0x5a>;
			memattr_ns = <0x5b>;
			linux,phandle = <0x7>;
			phandle = <0x7>;
		};

		rpu_cpu0: rpu_cpu@0 {
			compatible = "cortex-r5f-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x411fc153>;
			arm,tcmtr = <0x10001>;
			arm,ctr = <0x8003c003>;
			arm,clidr = <0x9200003>;
			arm,ccsidr0 = <0xf01fe019>;
			arm,ccsidr1 = <0xf01fe019>;
			arm,mp-affinity = <0x100>;
			arm,id_pfr0 = <0x131>;
			arm,reset-hivecs = <0x1>;
			#interrupt-cells = <0x1>;
			reg = <0x0>;
			mr = <0x5c>;
			memory = <0x5c>;
			gpios = <0x4c 0x0 0x5d 0x0 0x5d 0x5>;
			gpio-names = "reset", "ncpuhalt", "vinithi";
			gdb-id = "Cortex-R5 #0";
			memattr_ns = <0x5e>;
			linux,phandle = <0x63>;
			phandle = <0x63>;
		};

		rpu_cpu1: rpu_cpu@1 {
			compatible = "cortex-r5f-arm-cpu";
			d-cache-line-size = <0x20>;
			d-cache-size = <0x8000>;
			device_type = "cpu";
			i-cache-line-size = <0x20>;
			i-cache-size = <0x8000>;
			arm,midr = <0x411fc153>;
			arm,tcmtr = <0x10001>;
			arm,ctr = <0x8003c003>;
			arm,clidr = <0x9200003>;
			arm,ccsidr0 = <0xf01fe019>;
			arm,ccsidr1 = <0xf01fe019>;
			arm,mp-affinity = <0x101>;
			arm,id_pfr0 = <0x131>;
			arm,reset-hivecs = <0x1>;
			#interrupt-cells = <0x1>;
			reg = <0x1>;
			mr = <0x5f>;
			memory = <0x5f>;
			gpios = <0x4c 0x1 0x5d 0x2 0x5d 0x1 0x5d 0x6>;
			gpio-names = "reset", "halt", "ncpuhalt", "vinithi";
			gdb-id = "Cortex-R5 #1";
			memattr_ns = <0x60>;
			linux,phandle = <0x64>;
			phandle = <0x64>;
		};
	};

	aliases {
		serial0 = "/amba@0/serial@0xFF000000";
		serial1 = "/amba@0/serial@0xFF010000";
		ethernet0 = "/amba@0/ethernet@0xFF0E0000";

		main_bus_for_apu {
			compatible = "qemu:memory-region";
			container = <0x52>;
			alias = <0x23>;
			priority = <0xffffffff>;
		};

		main_bus_for_pl {
			compatible = "qemu:memory-region";
			container = <0x1a>;
			alias = <0x61>;
			priority = <0xffffffff>;
		};
	};

	amba_apu: amba_apu@0 {
		#address-cells = <0x2>;
		#size-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		linux,phandle = <0x52>;
		phandle = <0x52>;

		timer {
			compatible = "arm,armv8-timer";
			interrupt-parent = <0x2>;
			interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
			clock-frequency = <0x5f5e100>;
		};

		dummy: dymmy@0 {
			interrupt-controller;
			#interrupt-cells = <0x1>;
			linux,phandle = <0x62>;
			phandle = <0x62>;
		};
	};

	amba_apu_gic: amba_apu_gic@0 {
		#address-cells = <0x2>;
		#priority-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		container = <0x1a>;
		priority = <0xffffffff>;

		gic: interrupt-controller@0xFD3FF000 {
			#address-cells = <0x0>;
			#size-cells = <0x0>;
			#interrupt-cells = <0x3>;
			#gpio-cells = <0x0>;
			compatible = "xlnx,zynqmp-scugic", "arm,gic";
			reg = <0x0 0xf9010000 0x1000 0x0 0x0 0xf9020000 0x20000 0x0 0x0 0xf9040000 0x20000 0x0 0x0 0xf9060000 0x20000 0x0>;
			interrupt-controller;
			num-irq = <0xc0>;
			interrupts-extended = <0x4 0x0 0x5 0x0 0x6 0x0 0x7 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x2 0x5 0x2 0x6 0x2 0x7 0x2 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x1 0x5 0x1 0x6 0x1 0x7 0x1 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x3 0x5 0x3 0x6 0x3 0x7 0x3 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x2 0x1 0x9 0x104 0x2 0x1 0x9 0x204 0x2 0x1 0x9 0x404 0x2 0x1 0x9 0x804>;
			num-cpu = <0x4>;
			revision = <0x2>;
			map-stride = <0x10000>;
			int-id = <0x202143b>;
			linux,phandle = <0x2>;
			phandle = <0x2>;
		};

		zynqmp-gic-cpu-alias@0xf9021000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9021000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9022000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9022000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9023000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9023000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9024000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9024000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9025000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9025000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9026000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9026000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9027000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9027000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9028000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9028000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf9029000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf9029000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902a000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902a000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902b000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902b000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902c000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902c000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902d000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902d000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902e000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902e000 0x1000 0x1>;
		};

		zynqmp-gic-cpu-alias@0xf902f000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x1>;
			reg = <0x0 0xf902f000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9061000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9061000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9062000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9062000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9063000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9063000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9064000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9064000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9065000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9065000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9066000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9066000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9067000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9067000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9068000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9068000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf9069000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf9069000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906a000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906a000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906b000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906b000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906c000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906c000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906d000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906d000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906e000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906e000 0x1000 0x1>;
		};

		zynqmp-gic-vcpu-alias@0xf906f000 {
			compatible = "qemu:memory-region";
			alias = <0x2 0x3>;
			reg = <0x0 0xf906f000 0x1000 0x1>;
		};
	};

	amba_rpu: amba_rpu@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		linux,phandle = <0x2a>;
		phandle = <0x2a>;

		rpu_gic: interrupt-controller@0xF9000000 {
			#address-cells = <0x0>;
			#interrupt-cells = <0x3>;
			#size-cells = <0x0>;
			compatible = "xlnx,zynqmp-scugic", "arm,gic";
			reg = <0x0 0xf9000000 0x0 0x1000 0x0 0x0 0xf9001000 0x0 0x100 0x0>;
			status = "disabled";
			interrupt-controller;
			num-irq = <0x100>;
			num-cpu = <0x2>;
			interrupts-extended = <0x63 0x0 0x64 0x0>;
			linux,phandle = <0x3>;
			phandle = <0x3>;
		};

		ddr_memory_2_for_rpu: ddr_memory_2_for_rpu {
			compatible = "qemu:memory-region";
			alias = <0x65>;
			reg = <0x0 0x30000 0x0 0x10000 0x0>;
			linux,phandle = <0xd>;
			phandle = <0xd>;
		};

		main_bus_for_rpu {
			compatible = "qemu:memory-region";
			alias = <0x1b>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	pmu_io_intc: dummy_pmu_intc@0 {
		#interrupt-cells = <0x2>;
		interrupt-controller;
		linux,phandle = <0x19>;
		phandle = <0x19>;
	};

	smmu_tbu0: tbu0_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x1c>;
		phandle = <0x1c>;
	};

	smmu_tbu1: tbu1_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x1d>;
		phandle = <0x1d>;
	};

	smmu_tbu2: tbu2_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x1e>;
		phandle = <0x1e>;
	};

	smmu_tbu3: tbu3_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x1f>;
		phandle = <0x1f>;
	};

	smmu_tbu4: tbu4_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x20>;
		phandle = <0x20>;
	};

	smmu_tbu5: tbu5_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x21>;
		phandle = <0x21>;
	};

	tbu3_master: tbu3_master@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x24>;
		phandle = <0x24>;

		main_bus_for_tbu3 {
			compatible = "qemu:memory-region";
			alias = <0x1b>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	tbu4_master: tbu4_master@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x25>;
		phandle = <0x25>;

		main_bus_for_tbu4 {
			compatible = "qemu:memory-region";
			alias = <0x1b>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	tbu5_master: tbu5_master@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x26>;
		phandle = <0x26>;

		main_bus_for_tbu5 {
			compatible = "qemu:memory-region";
			alias = <0x1b>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	cci_slave: cci_slave@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x23>;
		phandle = <0x23>;

		downstream {
			compatible = "qemu:memory-region";
			alias = <0x1b>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
		};
	};

	misc_clk: misc_clk {
		#clock-cells = <0x0>;
		clock-frequency = <0x2faf080>;
		compatible = "fixed-clock";
		linux,phandle = <0x39>;
		phandle = <0x39>;
	};

	pcie_ingress: pcie_ingress@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "simple-bus";
		linux,phandle = <0x4d>;
		phandle = <0x4d>;

		downstream {
			compatible = "qemu:memory-region";
			alias = <0x1d>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	pcie_overlay: pcie_overlay@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		priority = <0x2>;
		compatible = "qemu:memory-region";
		container = <0x1a>;
		linux,phandle = <0x4e>;
		phandle = <0x4e>;
	};

	ddr_alias: ddr_alias@0 {
		compatible = "qemu:memory-region";
		container = <0x66>;
		alias = <0x1>;
		reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
	};

	qemu_sysmem: qemu_sysmem@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "qemu:system-memory";
		linux,phandle = <0x66>;
		phandle = <0x66>;
	};

	pmu_memattr: pmu_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x40>;
	};

	apu0_s_memattr: apu0_s_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x80>;
		linux,phandle = <0x54>;
		phandle = <0x54>;
	};

	apu0_ns_memattr: apu0_ns_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x80>;
		linux,phandle = <0x55>;
		phandle = <0x55>;
	};

	apu1_s_memattr: apu1_s_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x8d>;
		linux,phandle = <0x56>;
		phandle = <0x56>;
	};

	apu1_ns_memattr: apu1_ns_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x8d>;
		linux,phandle = <0x57>;
		phandle = <0x57>;
	};

	apu2_s_memattr: apu2_s_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x8e>;
		linux,phandle = <0x58>;
		phandle = <0x58>;
	};

	apu2_ns_memattr: apu2_ns_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x8e>;
		linux,phandle = <0x59>;
		phandle = <0x59>;
	};

	apu3_s_memattr: apu3_s_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x8f>;
		linux,phandle = <0x5a>;
		phandle = <0x5a>;
	};

	apu3_ns_memattr: apu3_ns_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x8f>;
		linux,phandle = <0x5b>;
		phandle = <0x5b>;
	};

	rpu0_memattr: rpu0_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x2e>;
		linux,phandle = <0x5e>;
		phandle = <0x5e>;
	};

	rpu1_memattr: rpu1_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x1>;
		master-id = <0x2f>;
		linux,phandle = <0x60>;
		phandle = <0x60>;
	};

	gem0_memattr: gem0_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x874>;
		linux,phandle = <0x3a>;
		phandle = <0x3a>;
	};

	gem1_memattr: gem1_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x875>;
		linux,phandle = <0x3b>;
		phandle = <0x3b>;
	};

	gem2_memattr: gem2_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x876>;
		linux,phandle = <0x3c>;
		phandle = <0x3c>;
	};

	gem3_memattr: gem3_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x877>;
		linux,phandle = <0x3d>;
		phandle = <0x3d>;
	};

	qspi_dma_memattr: qspi_dma_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x873>;
		linux,phandle = <0x3f>;
		phandle = <0x3f>;
	};

	pcie_ns_memattr: pcie_ns_ma {
		compatible = "qemu:memory-transaction-attr";
		secure = <0x0>;
		master-id = <0x4d0>;
		linux,phandle = <0x4f>;
		phandle = <0x4f>;
	};

	protected_amba: protected_amba@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		linux,phandle = <0x1b>;
		phandle = <0x1b>;

		downstream {
			compatible = "qemu:memory-region";
			alias = <0x1a>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	ddr3_ram: memory@00000000 {
		compatible = "qemu:memory-region";
		device_type = "memory";
		container = <0x1a>;
		linux,phandle = <0x1>;
		phandle = <0x1>;
	};

	pmu_ram: pmu_ram@ffdc0000 {
		compatible = "qemu:memory-region";
		container = <0x1a>;
		qemu,ram = <0x1>;
		reg = <0x0 0xffdc0000 0x20000>;
	};

	tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
		compatible = "qemu:memory-region";
		container = <0x50>;
		qemu,ram = <0x1>;
		reg = <0x0 0x0 0x10000>;
	};

	tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
		compatible = "qemu:memory-region";
		container = <0x50>;
		qemu,ram = <0x1>;
		reg = <0x0 0x20000 0x10000>;
	};

	tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
		compatible = "qemu:memory-region";
		container = <0x51>;
		qemu,ram = <0x1>;
		reg = <0x0 0x0 0x10000>;
		linux,phandle = <0x67>;
		phandle = <0x67>;
	};

	tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
		compatible = "qemu:memory-region";
		container = <0x51>;
		qemu,ram = <0x1>;
		reg = <0x0 0x20000 0x10000>;
		linux,phandle = <0x68>;
		phandle = <0x68>;
	};

	icache_rpu0: icache_rpu0@0x40000 {
		compatible = "qemu:memory-region";
		container = <0x50>;
		qemu,ram = <0x1>;
		reg = <0x0 0x40000 0x8000>;
	};

	dcache_rpu0: dcache_rpu0@0x50000 {
		compatible = "qemu:memory-region";
		container = <0x50>;
		qemu,ram = <0x1>;
		reg = <0x0 0x50000 0x8000>;
	};

	icache_rpu1: icache_rpu1@0x30000 {
		compatible = "qemu:memory-region";
		container = <0x51>;
		qemu,ram = <0x1>;
		reg = <0x0 0x30000 0x8000>;
		linux,phandle = <0xa>;
		phandle = <0xa>;
	};

	dcache_rpu1: dcache_rpu1@0x40000 {
		compatible = "qemu:memory-region";
		container = <0x51>;
		qemu,ram = <0x1>;
		reg = <0x0 0x40000 0x8000>;
		linux,phandle = <0xb>;
		phandle = <0xb>;
	};

	ipibuf_ram: ipibuf@ff990000 {
		compatible = "qemu:memory-region";
		container = <0x1a>;
		qemu,ram = <0x1>;
		reg = <0x0 0xff990000 0x1000>;
	};

	ocm_ram: ocm_ram@0 {
		compatible = "qemu:memory-region";
		linux,phandle = <0x29>;
		phandle = <0x29>;
	};

	ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
		compatible = "qemu:memory-region";
		container = <0x29>;
		qemu,ram = <0x1>;
		reg = <0x0 0x0 0x10000>;
	};

	ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
		compatible = "qemu:memory-region";
		container = <0x29>;
		qemu,ram = <0x1>;
		reg = <0x0 0x10000 0x10000>;
	};

	ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
		compatible = "qemu:memory-region";
		container = <0x29>;
		qemu,ram = <0x1>;
		reg = <0x0 0x20000 0x10000>;
	};

	ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
		compatible = "qemu:memory-region";
		container = <0x29>;
		qemu,ram = <0x1>;
		reg = <0x0 0x30000 0x10000>;
	};

	tcm_cache_rpu0: tcm_cache_rpu0@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "qemu:memory-region";
		linux,phandle = <0x50>;
		phandle = <0x50>;

		atcm1_for_rpu0: atcm1_for_rpu0 {
			compatible = "qemu:memory-region";
			alias = <0x67>;
			reg = <0x0 0x10000 0x0 0x10000 0x1>;
			linux,phandle = <0x8>;
			phandle = <0x8>;
		};

		btcm1_for_rpu0: btcm1_for_rpu0 {
			compatible = "qemu:memory-region";
			alias = <0x68>;
			reg = <0x0 0x30000 0x0 0x10000 0x1>;
			linux,phandle = <0x9>;
			phandle = <0x9>;
		};
	};

	amba_rpu0: amba_rpu0@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		linux,phandle = <0x5c>;
		phandle = <0x5c>;

		tcm_cache_rpu0 {
			compatible = "qemu:memory-region";
			alias = <0x50>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
		};

		rpu_bus_for_rpu0 {
			compatible = "qemu:memory-region";
			alias = <0x2a>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	tcm_cache_rpu1: tcm_cache_rpu1@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "qemu:memory-region";
		linux,phandle = <0x51>;
		phandle = <0x51>;
	};

	amba_rpu1: amba_rpu1@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		#priority-cells = <0x1>;
		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
		ranges;
		linux,phandle = <0x5f>;
		phandle = <0x5f>;

		tcm_cache_rpu1 {
			compatible = "qemu:memory-region";
			alias = <0x51>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
		};

		rpu_bus_for_rpu1 {
			compatible = "qemu:memory-region";
			alias = <0x2a>;
			reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
		};
	};

	amba_pl: amba_pl {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;
		linux,phandle = <0x61>;
		phandle = <0x61>;
	};

	mdio0: mdio {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		compatible = "mdio";
		linux,phandle = <0x3e>;
		phandle = <0x3e>;

		phy0: phy@7 {
			compatible = "88e1118r";
			device_type = "ethernet-phy";
			reg = <0x7>;
		};

		phy1: phy@12 {
			compatible = "88e1118r";
			device_type = "ethernet-phy";
			reg = <0xc>;
		};
	};
};