Re: [Xen-devel] [PATCH v3 5/5] x86: use PDEP for PTE flags insertion when available

[Rich Persaud <persaur@xxxxxxxxx>]

On Aug 17, 2018, at 03:24, Jan Beulich <JBeulich@xxxxxxxx> wrote:

This replaces 5 instructions by a single one, further reducing code size,
cache, and TLB footprint (in particular on systems supporting BMI2).

This link claims that BMI2 may be less performant/consistent on AMD Ryzen than Intel:

https://www.reddit.com/r/Amd/comments/60i6er/ryzen_and_bmi2_strange_behavior_and_high_latencies/

Would this patch series have any benefit to L0 hypervisors/rootkits (e.g. Bromium, Bareflank or similar hypervisors) which could be monitoring L1 Xen?  Or Xen as L0 hypervisor and Hyper-V as L1 hypervisor?

Rich

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