Re: [Xen-devel] [PATCH 7/6] x86/msr: Introduce msr_{set, clear}_bits() helpers

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 27/06/18 15:17, Roger Pau Monné wrote:
> On Tue, Jun 26, 2018 at 07:22:44PM +0100, Andrew Cooper wrote:
>> One reoccuring code pattern is to read an MSR, modify one or more bits,
>> and write the result back.  Introduce helpers for this purpose.
>>
>> First, introduce rdmsr_split() and wrmsr_split() which are tiny static inline
>> wrappers which deal with the MSR value in two 32bit halves.
> I think this needs some kind of explanation, since rdmsr/wrmsr already deal
> with MSR in two 32bit halves.

If you look closely, that's not how rdmsr() works.  All of these macros
are for the chopping block over the course of the MSR cleanup.

>> diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h
>> index 09bb3f4..6619af9 100644
>> --- a/xen/arch/x86/efi/efi-boot.h
>> +++ b/xen/arch/x86/efi/efi-boot.h
>> @@ -229,18 +229,15 @@ static void __init efi_arch_pre_exit_boot(void)
>>  
>>  static void __init noreturn efi_arch_post_exit_boot(void)
>>  {
>> -    u64 cr4 = XEN_MINIMAL_CR4 & ~X86_CR4_PGE, efer;
>> +    bool nx = cpuid_ext_features & cpufeat_mask(X86_FEATURE_NX);
>> +    uint64_t cr4 = XEN_MINIMAL_CR4 & ~X86_CR4_PGE, tmp;
>>  
>>      efi_arch_relocate_image(__XEN_VIRT_START - xen_phys_start);
>>      memcpy((void *)trampoline_phys, trampoline_start, cfg.size);
>>  
>>      /* Set system registers and transfer control. */
>>      asm volatile("pushq $0\n\tpopfq");
>> -    rdmsrl(MSR_EFER, efer);
>> -    efer |= EFER_SCE;
>> -    if ( cpuid_ext_features & cpufeat_mask(X86_FEATURE_NX) )
>> -        efer |= EFER_NXE;
>> -    wrmsrl(MSR_EFER, efer);
>> +    msr_set_bits(MSR_EFER, EFER_SCE | (nx ? EFER_NXE : 0));
> I think you can directly use cpu_has_nx?

boot_cpu_data[] isn't filled at this point during boot.

> Also isn't NX always present on amd64 capable CPUs?

If only. :(

The first generation of Intel's 64bit processors don't have NX.

~Andrew

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