Re: [Xen-devel] [PATCH v2 04/10] x86/HVM/SVM: Add AVIC initialization code

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 21.05.18 at 20:41, <jnataraj@xxxxxxx> wrote:
> On 5/16/2018 10:29 AM, Jan Beulich wrote:
>>>>> On 07.05.18 at 23:07, <Janakarajan.Natarajan@xxxxxxx> wrote:
>>> +/*
>>> + * Note:
>>> + * Currently, svm-avic mode is not supported with nested virtualization.
>>> + * Therefore, it is not yet currently enabled by default. Once the support
>>> + * is in-place, this should be enabled by default.
>>> + */
>>> +bool svm_avic = false;
>>> +
>>> +static const char __section(".bss.page_aligned.const") __aligned(PAGE_SIZE)
>>> +    avic_backing_page[PAGE_SIZE];
>> So nothing ever writes to this page? I think it would be misleading if CPU 
>> side
>> writes were possible, yet this was marked const.
> 
> 
> AVIC hardware uses this page to look at permission bits. AFAIK, nothing 
> writes to this page.
> 
> 
>>
>> Also - does this really need allocating statically (rather than just on 
> systems
>> actually needing it)?
> 
> 
> I'm not aware of systems that don't have permission bits.

Older AMD ones? Intel ones?

>>> +int svm_avic_dom_init(struct domain *d)
>>> +{
>>> +    int ret = 0;
>>> +    struct page_info *pg;
>>> +
>>> +    if ( !svm_avic || !has_vlapic(d) )
>>> +        return 0;
>>> +
>>> +    /*
>>> +     * Note:
>>> +     * AVIC hardware walks the nested page table to check permissions,
>>> +     * but does not use the SPA address specified in the leaf page
>>> +     * table entry since it uses  address in the AVIC_BACKING_PAGE pointer
>>> +     * field of the VMCB. Therefore, we set up a dummy page for APIC.
>>> +     */
>>> +    set_mmio_p2m_entry(d, paddr_to_pfn(APIC_DEFAULT_PHYS_BASE),
>>> +                       _mfn(virt_to_mfn(avic_backing_page)), PAGE_ORDER_4K,
>>> +                       p2m_access_rw);
>>> +
>>> +    /* Init AVIC logical APIC ID table */
>>> +    pg = alloc_domheap_page(d, MEMF_no_owner);
>> Do you really mean d here (and below) rather than NULL?
> 
> 
> Wouldn't the logical and physical APIC ID table pages be connected to 
> the domain and its heap?

Not with MEMF_no_owner afaict.

Jan



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