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Re: [Xen-devel] [PATCH for-4.11] x86/pv: Unconditionally hide EFER.SVME from PV guests



>>> On 04.05.18 at 19:28, <andrew.cooper3@xxxxxxxxxx> wrote:
> --- a/xen/arch/x86/pv/emul-priv-op.c
> +++ b/xen/arch/x86/pv/emul-priv-op.c
> @@ -867,7 +867,9 @@ static int read_msr(unsigned int reg, uint64_t *val,
>          return X86EMUL_OKAY;
>  
>      case MSR_EFER:
> -        *val = read_efer();
> +        /* Hide unknown bits, and unconditionally hide SVME from guests. */
> +        *val = read_efer() & EFER_KNOWN_MASK & ~EFER_SVME;
> +        /* Hide the 64-bit features from 32-bit guests. */
>          if ( is_pv_32bit_domain(currd) )
>              *val &= ~(EFER_LME | EFER_LMA | EFER_LMSLE);

Wouldn't it be better then to also move the LMSLE hiding up? And what about
SCE? PV guests not being allowed to write EFER, I would think they shouldn't
see bits they aren't supposed to care about and aren't able to set. If we
were to allow such writes, I assume it would only be NX and maybe FFXSE
which we'd permit the guest to control. Obviously (I think) LME and LMA ought
to be seen set by 64-bit guests.

Jan



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