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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 2/8] x86/HVM/SVM: Add AVIC initialization code
On 26/04/18 16:32, Natarajan, Janakarajan wrote:
> On 4/16/2018 10:55 AM, Jan Beulich wrote:
>>>>> On 04.04.18 at 01:01, <Janakarajan.Natarajan@xxxxxxx> wrote:
>>>
>>> +int svm_avic_dom_init(struct domain *d)
>>> +{
>>> + int ret = 0;
>>> + struct page_info *pg;
>>> +
>>> + if ( !svm_avic || !has_vlapic(d) )
>>> + return 0;
>>> +
>>> + /*
>>> + * Note:
>>> + * AVIC hardware walks the nested page table to check permissions,
>>> + * but does not use the SPA address specified in the leaf page
>>> + * table entry since it uses address in the AVIC_BACKING_PAGE
>>> pointer
>>> + * field of the VMCB. Therefore, we set up a dummy page for
>>> APIC _mfn(0).
>>> + */
>>> + set_mmio_p2m_entry(d, paddr_to_pfn(APIC_DEFAULT_PHYS_BASE),
>>> + _mfn(0), PAGE_ORDER_4K,
>>> + p2m_get_hostp2m(d)->default_access);
>> The use of MFN 0 here looks risky to me: How do you guarantee nothing
>> else
>> might ever use that P2M entry?
>
> Do you have any suggestions for an alternative to MFN 0 that is
> guaranteed to never be used?
static const __section(".bss.page_aligned.const") __aligned(PAGE_SIZE)
avic_backing_page[PAGE_SIZE];
However, don't writes outside of APIC registers get dumped into this
page? If so, you need to allocate a new page per guest. If not, where
do the writes outside of the APIC registers get dumped?
~Andrew
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