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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v3 33/39] ARM: new VGIC: Add preliminary stub implementation
On Wed, 21 Mar 2018, Andre Przywara wrote:
> The ARM arch code requires an interrupt controller emulation to implement
> vgic_clear_pending_irqs(), although it is suspected that it is actually
> not necessary. Go with a stub for now to make the linker happy.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxxxxx>
> Reviewed-by: Julien Grall <julien.grall@xxxxxxx>
> ---
> xen/arch/arm/vgic/vgic.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
> index 23b8abfc5e..b70fdaaecb 100644
> --- a/xen/arch/arm/vgic/vgic.c
> +++ b/xen/arch/arm/vgic/vgic.c
> @@ -791,6 +791,14 @@ void gic_dump_vgic_info(struct vcpu *v)
> spin_unlock_irqrestore(&v->arch.vgic.ap_list_lock, flags);
> }
>
> +void vgic_clear_pending_irqs(struct vcpu *v)
> +{
> + /*
> + * TODO: It is unclear whether we really need this, so we might instead
> + * remove it on the caller site.
> + */
> +}
This is OK for now.
However, thinking about this issue, is it possible for a vcpu to send an
interrupt to an offline vcpu, maybe an SGI? What would happen in that
case? It looks like that vgic_mmio_write_sgir would allow it. Otherwise,
a vcpu could cause the generation of a physical interrupt, an SPI,
targeting an offline vcpu.
Maybe we should WARN in case ap_list is not empty?
> /**
> * arch_move_irqs() - migrate the physical affinity of hardware mapped vIRQs
> * @v: the vCPU, already assigned to the new pCPU
> --
> 2.14.1
>
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