[Xen-devel] [ATTN SVM maintainers] Re: [PATCH V6] x86/hvm: fix domain crash when CR3 has the noflush bit set

[George Dunlap <george.dunlap@xxxxxxxxxx>]

On 02/28/2018 10:38 AM, Razvan Cojocaru wrote:
> In hardware, when PCID support is enabled and the NOFLUSH bit is set
> when writing a CR3 value, the hardware will clear that that bit and
> change the CR3 without flushing the TLB. hvm_set_cr3(), however, was
> ignoring this bit; the result was that post-vm_event checks detected
> an invalid CR3 value and crashed the domain.
> 
> Handle NOFLUSH in hvm_set_cr3() by:
> 1. Clearing the bit
> 2. Passing a "noflush" flag to lower-level cr3 setting functions to
> indicate that a flush should not be performed.
> 
> Also clear X86_CR3_NOFLUSH when reporting CR3 monitored CR3 writes.
> 
> This allows introspection to be used on VMs whose operating system uses
> the NOFLUSH bit.
> 
> Signed-off-by: Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>
> Reported-by: Bitweasil <bitweasil@xxxxxxxxxxxxxx>
> Suggested-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
> Acked-by: Tamas K Lengyel <tamas@xxxxxxxxxxxxx>
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
> Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>
> Acked-by: George Dunlap <george.dunlap@xxxxxxxxxx>

Boris / Suvaree, any opinions on the SVM changes?

 -George

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