Re: [Xen-devel] [PATCH 2/5] x86/pv: Avoid leaking other guests' MSR_TSC_AUX values into PV context

[Wei Liu <wei.liu2@xxxxxxxxxx>]

On Tue, Feb 20, 2018 at 11:58:40AM +0000, Andrew Cooper wrote:
> If the CPU pipeline supports RDTSCP or RDPID, a guest can observe the value in
> MSR_TSC_AUX, irrespective of whether the relevant CPUID features are
> advertised/hidden.
> 

This setup works only because CR4.TSD=0?

> At the moment, paravirt_ctxt_switch_to() only writes to MSR_TSC_AUX if
> TSC_MODE_PVRDTSCP mode is enabled, but this is not the default mode.
> Therefore, default PV guests can read the value from a previously scheduled
> HVM vcpu, or TSC_MODE_PVRDTSCP-enabled PV guest.
> 
> Alter the PV path to always write to MSR_TSC_AUX, using 0 in the common case.
> 
> To amortise overhead cost, introduce wrmsr_tsc_aux() which performs a lazy
> update of the MSR, and use this function consistently across the codebase.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

The code looks correct to me.

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