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Re: [Xen-devel] [PATCH v2 1/2] x86/hvm: introduce cr_mask to store trapped bits of CR accesses

On 19/02/18 15:04, Roger Pau Monné wrote:
> On Fri, Feb 16, 2018 at 12:49:57PM +0000, Andrew Cooper wrote:
>> On 16/02/18 12:10, Roger Pau Monne wrote:
>>> diff --git a/xen/include/asm-x86/hvm/vcpu.h b/xen/include/asm-x86/hvm/vcpu.h
>>> index d93166fb92..811d4c10ae 100644
>>> --- a/xen/include/asm-x86/hvm/vcpu.h
>>> +++ b/xen/include/asm-x86/hvm/vcpu.h
>>> @@ -156,6 +156,9 @@ struct hvm_vcpu {
>>>       */
>>>      unsigned long       hw_cr[5];
>>> +    /* Cached copy of the trapped bits of CRs. Used for CR0 and CR4. */
>>> +    unsigned long       mask_cr[5];
>> We only need masks for cr0 and cr4, and I don't expect this to change
>> for the foreseeable future (CR4 still has plenty of available bits in
>> it).  I'd recommend:
>> unsigned long cr0_host_mask, cr4_host_mask;
> OK, I've used an array to keep consistency with the other CR array
> fields, but I guess here it makes less sense because only two of them
> are going to be used.

I'll be dropping the arrays in due course anyway.  Some of the value
aren't used at all, and it will simplify code which is common between PV
and HVM.


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