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Re: [Xen-devel] PVH Dom0 ACPI tables



On Thu, Feb 15, 2018 at 03:05:03AM -0700, Jan Beulich wrote:
> >>> On 14.02.18 at 11:30, <roger.pau@xxxxxxxxxx> wrote:
> > Hello,
> > 
> > After the comments on the ACPI whitelisting patch for PVH Dom0 I've
> > decided to post the list of ACPI tables that I've used to create the
> > current whitelist, together with other tables that I've not yet added.
> > 
> > Allowed tables
> > 
> > DSDT*, FACP*, FACS*, PSDT*, SSDT*, SBST*, ASF, MCFG*, SLIC*, MSDM*,
> > UEFI, WDAT*, BGRT, FPDT*, S3PT*, IBFT.
> > 
> > * Already whitelisted.
> > 
> > Tables that might need mappings
> > 
> > BERT, MCHI, SPCR, SPMI, TCPA, WDDT, WDRT, PCCT, WPBT
> 
> You have BERT here, but none of ERST, EINJ, or HEST above.
> Albeit ERST and HEST are in use by Xen, so may need to go on
> the list further down instead.

Hm, right I've missed those. So ERST and HEST are in used by Xen and
should go below (or to a new category, since it's not a device but a
table itself that's being used by Xen).

EINJ doesn't look safe to pass through to Dom0, since Injection
actions contain Register Regions that could contain Dom0 GFNs.

> > Tables that could point to devices being used by Xen
> > 
> > DBG2, DBGP
> > 
> > Tables related to devices in use by Xen (or not available to Dom0)
> > 
> > HPET, DMAR, IVRS, WAET, CSRT, BOOT, MADT,
> 
> Why WAET, CSRT, and BOOT? I can't find Xen using any of these.

WAET contains information about devices not available to Dom0 (RTC and
ACPI PM timer).

CSRT is more of a grey area, it contains information about interrupt
controllers and timers, and those devices are likely not available to
Dom0.

BOOT contains an offset into the CMOS, which is not available to Dom0.

> 
> > System topology related
> > 
> > SLIT, SRAT, MPST, PMTT, RASF*
> > 
> > * Not sure allowing Dom0 to activate 'patrol scrub' is safe.
> > 
> > ARM only
> > 
> > IORT, GTDT, STAO
> 
> I didn't think STAO is ARM-specific.

Right, it also shouldn't be present when booting on bare metal.

Thanks, Roger.

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