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Re: [Xen-devel] [PATCH v10 05/11] x86/entry: Organise the use of MSR_SPEC_CTRL at each entry/exit point

>>> On 25.01.18 at 15:46, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 25/01/18 14:36, Jan Beulich wrote:
>>>>> On 25.01.18 at 15:12, <andrew.cooper3@xxxxxxxxxx> wrote:
>>> On 25/01/18 13:08, Jan Beulich wrote:
>>>> It may also be worthwhile again to pull up the zeroing of %edx,
>>>> using %dl instead of $0 in the movb (and maybe then also
>>>> similarly in DO_SPEC_CTRL_EXIT_TO_XEN, but there I'm less
>>>> certain it couldn't have a negative effect).
>>> What negative effects are you worried about?  These macros are self
>>> contained.
>> The result of the xor then is an input to the cmp, which may be
>> one cycle more latency than with the immediate zero.
> Why?  Cmp writes all flags and reads none of them, so doesn't have any
> flags dependency on earlier instructions.
> It is only instructions which partially preserve older flag bits (and
> where undefined behaviour is complicated) which suffer flags-merge
> penalties.

I'm not talking about an eflags dependency, but that on the
register (%edx being written by xor, %dl used by cmp).


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